Intel E3815 FH8065301567411 데이터 시트
제품 코드
FH8065301567411
PCU – iLB – Low Pin Count (LPC) Bridge
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
4519
35.2.7
Serialized IRQ (SERIRQ)
35.2.7.1
Overview
The interrupt controller supports a serial IRQ scheme. The signal used to transmit this
information is shared between the interrupt controller and all peripherals that support
serial interrupts. The signal line, ILB_LPC_SERIRQ, is synchronous to LPC clock, and
follows the sustained tri-state protocol that is used by LPC signals. The serial IRQ
protocol defines this sustained tri-state signaling in the following fashion:
information is shared between the interrupt controller and all peripherals that support
serial interrupts. The signal line, ILB_LPC_SERIRQ, is synchronous to LPC clock, and
follows the sustained tri-state protocol that is used by LPC signals. The serial IRQ
protocol defines this sustained tri-state signaling in the following fashion:
•
S - Sample Phase: Signal driven low
•
R - Recovery Phase: Signal driven high
•
T - Turn-around Phase: Signal released
The interrupt controller supports 21 serial interrupts. These represent the 15 ISA
interrupts (IRQ0- 1, 3-15), the four PCI interrupts, and the control signals SMI# and
IOCHK#. Serial interrupt information is transferred using three types of frames:
interrupts (IRQ0- 1, 3-15), the four PCI interrupts, and the control signals SMI# and
IOCHK#. Serial interrupt information is transferred using three types of frames:
•
Start Frame: ILB_LPC_SERIRQ line driven low by the interrupt controller to indicate
the start of IRQ transmission
the start of IRQ transmission
•
Data Frames: IRQ information transmitted by peripherals. The interrupt controller
supports 21 data frames.
supports 21 data frames.
•
Stop Frame: ILB_LPC_SERIRQ line driven low by the interrupt controller to indicate
end of transmission and next mode of operation.
end of transmission and next mode of operation.
35.2.7.2
Start Frame
The serial IRQ protocol has two modes of operation which affect the start frame:
•
Continuous Mode: The interrupt controller is solely responsible for generating the
start frame
start frame
•
Quiet Mode: Peripheral initiates the start frame, and the interrupt controller
completes it.
completes it.
These modes are entered via the length of the stop frame.
Continuous mode must be entered first, to start the first frame. This start frame width
is 8 LPC clocks. This is a polling mode.
is 8 LPC clocks. This is a polling mode.
In Quiet mode, the ILB_LPC_SERIRQ line remains inactive and pulled up between the
Stop and Start Frame until a peripheral drives ILB_LPC_SERIRQ low. The interrupt
controller senses the line low and drives it low for the remainder of the Start Frame.
Since the first LPC clock of the start frame was driven by the peripheral, the interrupt
controller drives ILB_LPC_SERIRQ low for 1 LPC clock less than in continuous mode.
This mode of operation allows for lower power operation.
Stop and Start Frame until a peripheral drives ILB_LPC_SERIRQ low. The interrupt
controller senses the line low and drives it low for the remainder of the Start Frame.
Since the first LPC clock of the start frame was driven by the peripheral, the interrupt
controller drives ILB_LPC_SERIRQ low for 1 LPC clock less than in continuous mode.
This mode of operation allows for lower power operation.