Intel 440GX 사용자 설명서
Motherboard Layout and Routing Guidelines
2-18
Intel
®
440GX AGPset Design Guide
Notice that the timing equations include an extra term to account for the delay due to routing of the
BCLK trace on the processor substrate from the processor edge fingers and the processor core.
Adding the BCLK adjustment to the timing calculations between processor and chipset guarantees
host clock synchronization between the AGPset and processor core. The minimum and maximum
values for this term are contained in
BCLK trace on the processor substrate from the processor edge fingers and the processor core.
Adding the BCLK adjustment to the timing calculations between processor and chipset guarantees
host clock synchronization between the AGPset and processor core. The minimum and maximum
values for this term are contained in
Table 2-9
.
Component timings for the Intel
®
Pentium
®
II processor and Intel
®
440GX AGPset are contained
in
Table 2-10
. The timing specifications are contained in the Intel
®
Pentium
®
II processor and
Intel
®
440GX AGPset Datasheets. These timing are for reference only.
Recommended values for system timings are contained in
Table 2-10
. Skew and jitter values for the
clock generator device come from the CK97 clock driver specification. The PCB skew spec is
based on the results of extensive simulations at Intel. The T
based on the results of extensive simulations at Intel. The T
adj
value is based on Intel’s experience
with systems that use the Intel
®
Pentium
®
Pro processor and Intel
®
Pentium
®
II processor.
The flight time requirements that result from using the component timing specifications and
recommended system timings are summarized in
recommended system timings are summarized in
Table 2-11
. All component values should be
verified against the current specifications before proceeding with analysis.
Table 2-9. Intel
®
Pentium
®
II
Processor and Intel
®
440GX AGPset 100 MHz Timing
Specifications
Timing Term
Intel
®
Pentium
II Processor
Intel
®
440GX AGPset
T
co,max
[ns]
4.66
4.45
T
co,min
[ns]
0.71
0.80
T
su
[ns]
1.97
3.00
T
h
[ns]
1.61
-0.10
T
clk,min
[ns]
0.77
Not applicable
T
clk,max
[ns]
0.84
No applicable
Table 2-10. Recommended 100 MHz System Timing Parameters
Timing Term
Value
T
skew,CLK
[ns]
0.18
T
skew,PCB
[ns]
0.15
T
jit
[ns]
0.25
T
adj
[ns]
0.40
Table 2-11. Recommended 100 MHz System Flight Time Specs
Driver
Receiver
T
flight,min
T
flight,max
Intel
®
Pentium
®
II
processor
AGPset
0.36
2.13
AGPset
Intel
®
Pentium
®
II
processor
0.37
1.76
Intel
®
Pentium
®
II
processor
Intel
®
Pentium
®
II
processor
1.23
2.39