FANUC Robotics America GFK-1541B 사용자 설명서

The status bits normally occupy a single block of memory.  The location of this block is specified
during configuration of the Ethernet Interface.  The first 16 bits of the block (see Table 5-3) are
the LAN Interface Status (LIS) bits.  The next 64 bits are the Channel Status bits (2 for each
channel).

1

Port 1 full duplex

2

Port 1 100Mbps

3

Port 2 full duplex

4

Port 2 100 Mbps

5-6

Reserved

7

RS-485 port fuse blown

8

AAUI (90-30) or AUI/BNC (90-70) fuse blown

9

Any SRTP Channel Error (error on any
channel)

10–12

Reserved

13

LAN OK

14

Resource problem

15

Reserved

16

LAN Interface OK

17

Data Transfer - Channel 1

18

Channel Error - Channel 1

...

...

47

Data Transfer - Channel 16

48

Channel Error - Channel 16

49

Data Transfer - Channel 17 (90-70 only)

50

Channel Error - Channel 17 (90-70 only)

...

...

79

Data Transfer - Channel 32 (90-70 only)

80

Channel Error - Channel 32 (90-70 only)

For Series 90-30 PLCs, bits 49-80 are reserved for future use.

Unless the “LAN Interface OK” bit is set (Status Bit 16), the other status bits are invalid.

(Status Bit 1) Port 1 Full Duplex: 

 This bit is set to 1 when Port 1 (or the only port on a module

that does not incorporate a embedded switch) is set to full duplex.  [Not implemented on the
CMM321].

(Status Bit 2) Port 1 100Mbps: 

 This bit is set to 1 when Port 1 (or the only port on a module that

does not incorporate a embedded switch) is operating at 100Mbps.

 (Status Bit 3) Port 2 Full Duplex: 

 This bit is set to 1 when Port 2 is set to full duplex.

 (Status Bit 4) Port 2 100Mbps: 

 This bit is set to 1 when Port 2 is operating at 100Mbps.

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