AMD Typewriter x86 사용자 설명서
Derivation of Multiplier Used for Integer Division by Constants
95
22007E/0—November 1999
AMD Athlon™ Processor x86 Code Optimization
/* Generate m, s for algorithm 1. Based on: Magenheimer,
D.J.; et al: “Integer Multiplication and Division on the HP
Precision Architecture”. IEEE Transactions on Computers, Vol
37, No. 8, August 1988, page 980. */
D.J.; et al: “Integer Multiplication and Division on the HP
Precision Architecture”. IEEE Transactions on Computers, Vol
37, No. 8, August 1988, page 980. */
else {
s = log2(d);
m_low = (((U64)(1)) << (32+s)) / ((U64)(d));
r = ((U32)((((U64)(1)) << (32+s)) % ((U64)(d))));
m = (r < ((d>>1)+1)) ? ((U32)(m_low)) : ((U32)(m_low))+1;
a = 1;
}
s = log2(d);
m_low = (((U64)(1)) << (32+s)) / ((U64)(d));
r = ((U32)((((U64)(1)) << (32+s)) % ((U64)(d))));
m = (r < ((d>>1)+1)) ? ((U32)(m_low)) : ((U32)(m_low))+1;
a = 1;
}
/* Reduce multiplier/shift factor for either algorithm to
smallest possible */
smallest possible */
while (!(m&1)) {
m = m >> 1;
s––;
}
m = m >> 1;
s––;
}
Signed Derivation for Algorithm, Multiplier, and Shift Factor
The utility sdiv.exe was compiled using the following code.
/* Code snippet to determine algorithm (a), multiplier (m),
and shift count (s) for 32-bit signed integer division,
given divisor d. Written for Microsoft Visual C compiler. */
and shift count (s) for 32-bit signed integer division,
given divisor d. Written for Microsoft Visual C compiler. */
/*
IN:
IN:
d = divisor, 2 <= d < 2^31
OUT:
a = algorithm
m = multiplier
s = shift count
m = multiplier
s = shift count
;algorithm 0
MOV EAX, m
MOV EDX, dividend
MOV ECX, EDX
IMUL EDX
SHR ECX, 31
SAR EDX, s
ADD EDX, ECX ; quotient in EDX
MOV EAX, m
MOV EDX, dividend
MOV ECX, EDX
IMUL EDX
SHR ECX, 31
SAR EDX, s
ADD EDX, ECX ; quotient in EDX