AMD Typewriter x86 사용자 설명서
Page Attribute Table (PAT)
183
22007E/0—November 1999
AMD Athlon™ Processor x86 Code Optimization
Variable-Range
MTRRs
MTRRs
A variable MTRR can be programmed to start at address
0000_0000h because the fixed MTRRs always override the
variable ones. However, it is recommended not to create an
overlap.
0000_0000h because the fixed MTRRs always override the
variable ones. However, it is recommended not to create an
overlap.
The upper two variable MTRRs should not be used by the BIOS
and are reserved for operating system use.
and are reserved for operating system use.
Variable-Range MTRR
Register Format
Register Format
The variable address range is power of 2 sized and aligned. The
range of supported sizes is from 2
range of supported sizes is from 2
12
to 2
36
in powers of 2. The
AMD Athlon processor does not implement A[35:32].
Figure 16. MTRRphysBasen Register Format
Note: A software attempt to write to reserved bits will generate a
general protection exception.
Physical
Specifies a 24-bit value which is extended by 12
Base
bits to form the base address of the region defined
in the register pair.
in the register pair.
Type
7
0
63
Reserved
Type
8
Symbol
Description
Bits
Physical Base Base address in Register Pair
35–12
Type
See MTRR Types and Properties 7–0
11
35
12
36
Physical Base