AMD Typewriter x86 사용자 설명서
Group II Optimizations—Secondary Optimizations
11
22007E/0—November 1999
AMD Athlon™ Processor x86 Code Optimization
Avoid Placing Code and Data in the Same 64-Byte Cache Line
Consider that the AMD Athlon processor cache line is twice the
size of previous processors. Code and data should not be shared
in the same 64-byte cache line, especially if the data ever
becomes modified. In order to maintain cache coherency, the
AMD Athlon processor may thrash its caches, resulting in lower
performance.
size of previous processors. Code and data should not be shared
in the same 64-byte cache line, especially if the data ever
becomes modified. In order to maintain cache coherency, the
AMD Athlon processor may thrash its caches, resulting in lower
performance.
In general the following should be avoided:
■
Self-modifying code
■
Storing data in code segments
See “Avoid Placing Code and Data in the Same 64-Byte Cache
Line” on page 50 for more details.
Line” on page 50 for more details.
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