Atmel SpW-10X 사용자 설명서

Ref.:   UoD_SpW-10X_ 

 

Issue:  3.4 

  

 

Date:  11

 

 

2

 

Document Change log 

19

th

-March-2004 

Issue 1.0 

Initial draft version 

Chris McClements 

26

th

-August-2004 

Issue 1.2 

Timing for FPGA model added 

Chris McClements 

16 November 2004 

Issue 1.3 

Register Definitions Updated 

Chris McClements 

27 April 2004 

Issue 1.4 

Latency and Jitter Specifications 
added 

Chris McClements 

2 May 2005 

Issue 1.5 

Footer indicates “Preliminary.” 

Section 8.6 subject to change 
notice added to front page. 

Steve Parkes 

21 December 2005 

Issue 1.6 

RMAP section added 

Chris McClements 

19

th

 July 2006 

Issue 1.7 

Corrections and clarifications 

Chris McClements 

18

th

 August 2006 

Issue 2.0 

Editorial changes and 
clarifications 

Steve Parkes 

3

rd

 July 2007 

Issue 2.1 

Added sections on ASIC pin 
placement, ASIC power 
consumption, bias resistors, 
phase locked loop and 
anomalies. 

Chris McClements 

Steve Parkes 

28

th

 September 2007 

Issue 2.2 

Modifications before handed to 
Atmel 

Chris McClements, 
Gerald Kempf 

4

th

 October 2007 

Issue 2.3 

Modifications to SpaceWire 
signal names (Map pin 1 to 0) 

Chris McClements, 
Gerald Kempf 

3

rd

 December 2007 

Issue 2.4 

Updates as user manual. 
Changed document name to 
UoD_SpW_10X_UserManual.doc 

Chris McClements, 
Gerald Kempf 

11

th

 December 2007 

Issue 2.5 

Redistribute with PLL settings 

Chris McClements 
Gerald Kempf 

18

th

 January 2008 

Issue 3.0 

Major edit providing clarifications 
and additional application details 
throughout document. 

Section added on Application 
Guidelines giving example circuit 
diagram and PCB layout 

Steve Parkes