Clevo 2700C 사용자 설명서
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Service Manual
- 128/256-Kbyte, ECC protected cache data array
– Low Power GTL+ system bus interface
- 64-bit data bus, 100-MHz operation
- Uniprocessor, two loads only (processor and I/O bridge/memory controller)
- Short trace length and low capacitance allows for single ended termination
– Voltage reduction technology
– Pentium III processor clock control
- Quick Start for low power, low exit latency clock ‘throttling’
- Deep Sleep mode for extremely low power dissipation
– Thermal diode for measuring processor temperature