Motorola MC68HC908MR32 사용자 설명서
Break Module (BRK)
Break Module Registers
MC68HC908MR16/MC68HC908MR32 — Rev. 4.0
Advance Information
MOTOROLA
Break Module (BRK)
365
21.6.3 Break Status Register
The break status register (SBSR) contains a flag to indicate that a break
caused an exit from wait mode. The flag is useful in applications
requiring a return to wait mode after exiting from a break interrupt.
caused an exit from wait mode. The flag is useful in applications
requiring a return to wait mode after exiting from a break interrupt.
BW — Break Wait Bit
This read/write bit is set when a break interrupt causes an exit from
wait mode. Clear BW by writing a logic 0 to it. Reset clears BW.
wait mode. Clear BW by writing a logic 0 to it. Reset clears BW.
1 = Break interrupt during wait mode
0 = No break interrupt during wait mode
0 = No break interrupt during wait mode
BW can be read within the break interrupt routine. The user can
modify the return address on the stack by subtracting 1 from it. The
following code is an example.
modify the return address on the stack by subtracting 1 from it. The
following code is an example.
This code works if the H register was stacked in the break interrupt
routine. Execute this code at the end of the break interrupt routine.
routine. Execute this code at the end of the break interrupt routine.
Address:
$FE00
Bit 7
6
5
4
3
2
1
Bit 0
Read:
R
R
R
R
R
R
BW
R
Write:
Reset:
0
Figure 21-6. SIM Break Status Register (SBSR)
HIBYTE
EQU
5
LOBYTE
EQU
6
; If not BW, do RTI
BRCLR
BW,BSR, RETURN
;
;
See if wait mode or stop mode
was exited by break.
TST
LOBYTE,SP
; If RETURNLO is not 0,
BNE
DOLO
; then just decrement low byte.
DEC
HIBYTE,SP
; Else deal with high byte also.
DOLO
DEC
LOBYTE,SP
; Point to WAIT/STOP opcode.
RETURN
PULH
RTI
; Restore H register.