사용자 설명서차례Contents3Figures11Tables15Revision History17Preface19About This Book19Audience19Organization19Definitions20Terms and Notation20Registers27Endian Order30Related Documents301 Overview of the AMD64 Architecture331.1 Introduction331.1.1 AMD64 Features331.1.2 Registers351.1.3 Instruction Set361.1.4 Media Instructions361.1.5 Floating-Point Instructions371.2 Modes of Operation381.2.1 Long Mode381.2.2 64-Bit Mode381.2.3 Compatibility Mode391.2.4 Legacy Mode392 Memory Model412.1 Memory Organization412.1.1 Virtual Memory412.1.2 Segment Registers422.1.3 Physical Memory432.1.4 Memory Management432.2 Memory Addressing462.2.1 Byte Ordering462.2.2 64-Bit Canonical Addresses472.2.3 Effective Addresses472.2.4 Address-Size Prefix492.2.5 RIP-Relative Addressing502.3 Pointers512.3.1 Near and Far Pointers512.4 Stack Operation512.5 Instruction Pointer523 General-Purpose Programming553.1 Registers553.1.1 Legacy Registers563.1.2 64-Bit-Mode Registers583.1.3 Implicit Uses of GPRs623.1.4 Flags Register653.1.5 Instruction Pointer Register683.2 Operands683.2.1 Data Types683.2.2 Operand Sizes and Overrides713.2.3 Operand Addressing723.2.4 Data Alignment723.3 Instruction Summary733.3.1 Syntax733.3.2 Data Transfer743.3.3 Data Conversion783.3.4 Load Segment Registers813.3.5 Load Effective Address813.3.6 Arithmetic823.3.7 Rotate and Shift843.3.8 Compare and Test853.3.9 Logical883.3.10 String883.3.11 Control Transfer903.3.12 Flags943.3.13 Input/Output953.3.14 Semaphores963.3.15 Processor Information973.3.16 Cache and Memory Management983.3.17 No Operation983.3.18 System Calls993.4 General Rules for Instructions in 64-Bit Mode993.4.1 Address Size993.4.2 Canonical Address Format1003.4.3 Branch-Displacement Size1003.4.4 Operand Size1003.4.5 High 32 Bits1003.4.6 Invalid and Reassigned Instructions1013.4.7 Instructions with 64-Bit Default Operand Size1023.5 Instruction Prefixes1033.5.1 Legacy Prefixes1033.5.2 REX Prefixes1063.6 Feature Detection1063.6.1 Feature Detection in a Virtualized Environment1083.7 Control Transfers1083.7.1 Overview1083.7.2 Privilege Levels1083.7.3 Procedure Stack1093.7.4 Jumps1103.7.5 Procedure Calls1113.7.6 Returning from Procedures1133.7.7 System Calls1163.7.8 General Considerations for Branching1163.7.9 Branching in 64-Bit Mode1173.7.10 Interrupts and Exceptions1183.8 Input/Output1223.8.1 I/O Addressing1223.8.2 I/O Ordering1233.8.3 Protected-Mode I/O1243.9 Memory Optimization1243.9.1 Accessing Memory1253.9.2 Forcing Memory Order1263.9.3 Caches1283.9.4 Cache Operation1293.9.5 Cache Pollution1303.9.6 Cache-Control Instructions1313.10 Performance Considerations1333.10.1 Use Large Operand Sizes1333.10.2 Use Short Instructions1333.10.3 Align Data1333.10.4 Avoid Branches1333.10.5 Prefetch Data1333.10.6 Keep Common Operands in Registers1343.10.7 Avoid True Dependencies1343.10.8 Avoid Store-to-Load Dependencies1343.10.9 Optimize Stack Allocation1343.10.10 Consider Repeat-Prefix Setup Time1343.10.11 Replace GPR with Media Instructions1343.10.12 Organize Data in Memory Blocks1353.11 Cross-Modifying Code1354 128-Bit Media and Scientific Programming1374.1 Overview1374.1.1 Origins1374.1.2 Compatibility1374.2 Capabilities1384.2.1 Types of Applications1384.2.2 Integer Vector Operations1384.2.3 Floating-Point Vector Operations1394.2.4 Data Conversion and Reordering1404.2.5 Block Operations1424.2.6 Matrix and Special Arithmetic Operations1444.2.7 Branch Removal1464.3 Registers1484.3.1 XMM Registers1484.3.2 MXCSR Register1494.3.3 Other Data Registers1524.3.4 rFLAGS Registers1524.4 Operands1534.4.1 Data Types1534.4.2 Operand Sizes and Overrides1554.4.3 Operand Addressing1554.4.4 Data Alignment1554.4.5 Integer Data Types1564.4.6 Floating-Point Data Types1584.4.7 Floating-Point Number Representation1594.4.8 Floating-Point Number Encodings1624.4.9 Floating-Point Rounding1644.5 Instruction Summary—Integer Instructions1654.5.1 Syntax1654.5.2 Data Transfer1674.5.3 Data Conversion1714.5.4 Data Reordering1724.5.5 Arithmetic1774.5.6 Shift1844.5.7 Compare1854.5.8 Logical1874.5.9 Save and Restore State1884.6 Instruction Summary—Floating-Point Instructions1884.6.1 Syntax1894.6.2 Data Transfer1894.6.3 Data Conversion1944.6.4 Data Reordering1974.6.5 Arithmetic1984.6.6 Compare2034.6.7 Logical2064.7 Instruction Effects on Flags2074.8 Instruction Prefixes2074.8.1 Supported Prefixes2074.8.2 Special-Use and Reserved Prefixes2084.8.3 Prefixes That Cause Exceptions2084.9 Feature Detection2084.10 Exceptions2094.10.1 General-Purpose Exceptions2094.10.2 SIMD Floating-Point Exception Causes2104.10.3 SIMD Floating-Point Exception Priority2144.10.4 SIMD Floating-Point Exception Masking2164.11 Saving, Clearing, and Passing State2204.11.1 Saving and Restoring State2204.11.2 Parameter Passing2204.11.3 Accessing Operands in MMX™ Registers2204.12 Performance Considerations2214.12.1 Use Small Operand Sizes2214.12.2 Reorganize Data for Parallel Operations2214.12.3 Remove Branches2214.12.4 Use Streaming Stores2224.12.5 Align Data2224.12.6 Organize Data for Cacheability2224.12.7 Prefetch Data2224.12.8 Use 128-Bit Media Code for Moving Data2234.12.9 Retain Intermediate Results in XMM Registers2234.12.10 Replace GPR Code with 128-Bit Media Code.2234.12.11 Replace x87 Code with 128-Bit Media Code2235 64-Bit Media Programming2255.1 Origins2255.2 Compatibility2255.3 Capabilities2265.3.1 Parallel Operations2265.3.2 Data Conversion and Reordering2275.3.3 Matrix Operations2285.3.4 Saturation2295.3.5 Branch Removal2305.3.6 Floating-Point (3DNow!™) Vector Operations2315.4 Registers2325.4.1 MMX™ Registers2325.4.2 Other Registers2325.5 Operands2335.5.1 Data Types2335.5.2 Operand Sizes and Overrides2355.5.3 Operand Addressing2355.5.4 Data Alignment2355.5.5 Integer Data Types2365.5.6 Floating-Point Data Types2375.6 Instruction Summary—Integer Instructions2395.6.1 Syntax2395.6.2 Exit Media State2415.6.3 Data Transfer2415.6.4 Data Conversion2435.6.5 Data Reordering2445.6.6 Arithmetic2485.6.7 Shift2515.6.8 Compare2525.6.9 Logical2545.6.10 Save and Restore State2555.7 Instruction Summary—Floating-Point Instructions2555.7.1 Syntax2565.7.2 Data Conversion2565.7.3 Arithmetic2575.7.4 Compare2605.8 Instruction Effects on Flags2605.9 Instruction Prefixes2605.9.1 Supported Prefixes2615.9.2 Special-Use and Reserved Prefixes2615.9.3 Prefixes That Cause Exceptions2615.10 Feature Detection2615.11 Exceptions2625.11.1 General-Purpose Exceptions2625.11.2 x87 Floating-Point Exceptions (#MF)2635.12 Actions Taken on Executing 64-Bit Media Instructions2645.13 Mixing Media Code with x87 Code2655.13.1 Mixing Code2655.13.2 Clearing MMX™ State2655.14 State-Saving2665.14.1 Saving and Restoring State2665.14.2 State-Saving Instructions2665.15 Performance Considerations2675.15.1 Use Small Operand Sizes2675.15.2 Reorganize Data for Parallel Operations2675.15.3 Remove Branches2685.15.4 Align Data2685.15.5 Organize Data for Cacheability2685.15.6 Prefetch Data2685.15.7 Retain Intermediate Results in MMX™ Registers2686 x87 Floating-Point Programming2696.1 Overview2696.1.1 Capabilities2696.1.2 Origins2706.1.3 Compatibility2706.2 Registers2706.2.1 x87 Data Registers2716.2.2 x87 Status Word Register (FSW)2736.2.3 x87 Control Word Register (FCW)2766.2.4 x87 Tag Word Register (FTW)2786.2.5 Pointers and Opcode State2796.2.6 x87 Environment2806.2.7 Floating-Point Emulation (CR0.EM)2816.3 Operands2816.3.1 Operand Addressing2816.3.2 Data Types2826.3.3 Number Representation2856.3.4 Number Encodings2886.3.5 Precision2926.3.6 Rounding2926.4 Instruction Summary2936.4.1 Syntax2936.4.2 Data Transfer and Conversion2956.4.3 Load Constants2976.4.4 Arithmetic2986.4.5 Transcendental Functions3016.4.6 Compare and Test3026.4.7 Stack Management3056.4.8 No Operation3056.4.9 Control3056.5 Instruction Effects on rFLAGS3086.6 Instruction Prefixes3096.7 Feature Detection3106.8 Exceptions3106.8.1 General-Purpose Exceptions3106.8.2 x87 Floating-Point Exception Causes3116.8.3 x87 Floating-Point Exception Priority3146.8.4 x87 Floating-Point Exception Masking3156.9 State-Saving3226.9.1 State-Saving Instructions3226.10 Performance Considerations3236.10.1 Replace x87 Code with 128-Bit Media Code3236.10.2 Use FCOMI-FCMOVx Branching3236.10.3 Use FSINCOS Instead of FSIN and FCOS3246.10.4 Break Up Dependency Chains324Index325크기: 2.26메가바이트페이지: 336Language: English매뉴얼 열기