데이터 시트 (HH80555KH1094M)차례Dual-Core Intel® Xeon® Processor 5000 Series1Contents3Figures4Tables5Revision History7Features81 Introduction91.1 Terminology111.2 State of Data121.3 References122 Electrical Specifications152.1 Front Side Bus and GTLREF152.2 Power and Ground Lands152.3 Decoupling Guidelines162.3.1 VCC Decoupling162.3.2 VTT Decoupling162.3.3 Front Side Bus AGTL+ Decoupling162.4 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking162.4.1 Front Side Bus Frequency Select Signals (BSEL[2:0])172.4.2 Phase Lock Loop (PLL) and Filter182.5 Voltage Identification (VID)192.6 Reserved or Unused Signals212.7 Front Side Bus Signal Groups212.8 GTL+ Asynchronous and AGTL+ Asynchronous Signals232.9 Test Access Port (TAP) Connection232.10 Mixing Processors242.11 Absolute Maximum and Minimum Ratings242.12 Processor DC Specifications252.12.1 VCC Overshoot Specification312.12.2 Die Voltage Validation323 Mechanical Specifications333.1 Package Mechanical Drawings333.2 Processor Component Keepout Zones373.3 Package Loading Specifications373.4 Package Handling Guidelines383.5 Package Insertion Specifications383.6 Processor Mass Specifications383.7 Processor Materials383.8 Processor Markings393.9 Processor Land Coordinates404 Land Listing434.1 Dual-Core Intel Xeon Processor 5000 Series Land Assignments434.1.1 Land Listing by Land Name434.1.2 Land Listing by Land Number525 Signal Definitions615.1 Signal Definitions616 Thermal Specifications696.1 Package Thermal Specifications696.1.1 Thermal Specifications696.1.2 Thermal Metrology756.2 Processor Thermal Features776.2.1 Thermal Monitor776.2.2 On-Demand Mode776.2.3 PROCHOT# Signal786.2.4 FORCEPR# Signal786.2.5 THERMTRIP# Signal786.2.6 Tcontrol and Fan Speed Reduction796.2.7 Thermal Diode797 Features837.1 Power-On Configuration Options837.2 Clock Control and Low Power States837.2.1 Normal State847.2.2 HALT or Enhanced Powerdown States847.2.3 Stop-Grant State857.2.4 Enhanced HALT Snoop or HALT Snoop State, Stop Grant Snoop State867.3 Enhanced Intel SpeedStep® Technology868 Boxed Processor Specifications898.1 Introduction898.2 Mechanical Specifications908.2.1 Boxed Processor Heat Sink Dimensions (CEK)918.2.2 Boxed Processor Heat Sink Weight998.2.3 Boxed Processor Retention Mechanism and Heat Sink Support (CEK)998.3 Electrical Requirements998.3.1 Fan Power Supply (Active CEK)998.3.2 Boxed Processor Cooling Requirements1008.4 Boxed Processor Contents1019 Debug Tools Specifications1039.1 Debug Port System Requirements1039.2 Target System Implementation1039.2.1 System Implementation1039.3 Logic Analyzer Interface (LAI)1039.3.1 Mechanical Considerations1049.3.2 Electrical Considerations104크기: 3.6메가바이트페이지: 104Language: English매뉴얼 열기