사용자 설명서차례Chapter 1. Overview131.1 Introduction131.2 Highlights131.3 What’s New131.4 Included Items131.5 The Low Pin Count Board14Figure 1-1: Demo Board Hardware Layout14Table 1-1: Pin Assignments141.6 Software Overview151.7 Running the Demonstrations15Chapter 2. PIC® MCU Architecture172.1 Introduction172.2 Core Basics17Figure 2-1: Simplified Enhanced Mid-Range PIC® MCU Block Diagram17Figure 2-2: Simplified Enhanced Mid-Range PIC® MCU Data Block Diagram18Figure 2-3: Simplified PIC18 Block Diagram192.3 Data/Program Bus202.4 Accumulator202.5 Instructions20Equation 2-1: Instruction Time20Example 2-1:202.6 Byte21Example 2-2:212.7 Bit21Example 2-3:212.8 Literal21Example 2-4:212.9 Control22Figure 2-4: Enhanced PIC16 General Format for Instructions23Figure 2-5: PIC18 General Format for Instructions242.10 Stack Level252.11 Memory Organization252.12 Program Memory252.12.1 Flash Program Memory252.12.2 Configuration Words252.12.3 Device ID252.12.4 Revision ID26Figure 2-6: Enhanced Mid-Range program memory map and call stack26Figure 2-7: PIC18 Program Memory Map and Call Stack272.12.5 User ID272.13 Data Memory272.13.1 Core Registers282.13.2 Special Function Registers282.13.3 General Purpose RAM282.13.4 Common RAM282.14 Banks28Figure 2-8: Enhanced Mid-range Banked Memory Partitioning29Figure 2-9: PIC16F1829 Memory Map – The correct bank must be selected before writing/reading from a register30Figure 2-10: PIC18F14K22 Data Memory Map32Figure 2-11: PIC18F14K22 Special Function Register Map – All of these are in bank 15 which is included in the “Access RAM”332.15 Data EEPROM Memory342.16 Programming Basics342.16.1 MPASM™ Assembler Operation34Figure 2-12: MPASM Assembler Operation342.16.2 XC8 Operation34Figure 2-13: XC8 Operation35Figure 2-14: Disassembly Figure352.16.3 Numbers in the Assembler36Table 2-1: Numbers in the Assembler362.16.4 Numbers in the XC8 Compiler36Table 2-2: Numbers in the Compiler362.17 MPASM Assembler Directives362.17.1 Banksel362.17.2 cblock36Example 2-5:362.17.3 Org (addr)372.17.4 End372.17.5 Errorlevel37Example 2-6:372.17.6 #include37Example 2-7:37Chapter 3. Lessons393.1 Lessons403.2 Lesson 1: Hello World (Turn on an LED)413.2.1 Introduction413.2.2 Hardware Effects413.2.3 Summary413.2.4 New Registers413.2.4.1 Both41Table 3-1: New Registers for Both Devices413.2.4.2 LATC413.2.4.3 PORTC413.2.4.4 TRISC41Table 3-2: TRIS Direction413.2.5 New Instructions423.2.5.1 Both42Table 3-3: New Instructions for Both Devices423.2.5.2 bsf42Example 3-1:423.2.5.3 bcF42Example 3-2:423.2.5.4 CLRF42Example 3-3:423.2.6 Assembly433.2.6.1 Enhanced Mid-range43Example 3-4:433.2.6.2 PIC1844Example 3-5:443.2.7 C Language453.2.7.1 Enhanced Mid-range45Example 3-6:453.2.7.2 PIC18463.3 Lesson 2: Blink473.3.1 Introduction473.3.2 Hardware Effects473.3.3 Summary473.3.4 New Registers473.3.4.1 Both47Table 3-4: New Registers for Both Devices473.3.5 New Instructions473.3.5.1 Both Devices47Table 3-5: New Instructions for Both Devices47Example 3-7:483.3.5.2 PIC1848Table 3-6: New Instructions for PIC18483.3.6 Assembly483.3.6.1 Enhanced Mid-range48Example 3-8:48Equation 3-1: Delay Speed49Example 3-9:49Example 3-10:493.3.6.2 PIC1850Example 3-11:503.3.7 C Language503.3.7.1 Both50Example 3-12:50Example 3-13:503.4 Lesson 3: Rotate513.4.1 Introduction513.4.2 Hardware Effects513.4.3 Summary513.4.4 New Registers51Table 3-7: New Registers for Both Devices513.4.5 New Instructions513.4.5.1 Both51Table 3-8: New Instructions for Both Devices513.4.5.2 Enhanced Mid-range52Table 3-9: New Instructions for Enhanced Mid-range523.4.5.3 PIC1852Table 3-10: New Instructions for PIC1852Figure 3-1: Logic Shift to the Right52Figure 3-2: Rotate Right through Carry523.4.6 Assembly523.4.6.1 Enhanced Mid-range52Example 3-14:52Table 3-11: Pin to LED Mapping53Table 3-12: LED Rotate53Table 3-13: LED Rotate53Example 3-15:533.4.6.2 PIC1853Example 3-16:533.4.7 C Language543.4.7.1 Both54Example 3-17:54Example 3-18:543.5 Lesson 4: Analog-to-Digital Conversion553.5.1 Introduction553.5.2 Hardware Effects553.5.3 Summary55Equation 3-2:553.5.4 New Registers553.5.4.1 Both55Table 3-14: New Registers for Both Devices55Table 3-15: ADC result that is left justified – Bits in Blue are mirrored to LATC. Bit 6 Reflects DS1, Bit 7 controls DS2, and so forth.563.5.4.2 PIC1656Table 3-16: New Registers for Enhanced Mid-range563.5.4.3 PIC1856Table 3-17: New Registers for PIC18563.5.5 New Instructions573.5.5.1 Both57Table 3-18: New Instructions for Both Devices57Example 3-19:57Table 3-19: Before SWAPF57Table 3-20: Before SWAPF57Example 3-20:57Table 3-21: After SWAPF57Figure 3-3: SWAPF Diagram573.5.6 Assembly583.5.6.1 Enhanced Mid-range58Example 3-21:583.5.6.2 PIC18:58Example 3-22:583.5.7 C Language58Example 3-23:58Table 3-22: ADRESH Before Shift58Table 3-23: Temporary Workspace Register After Shift593.6 Lesson 5: Variable Speed Rotate603.6.1 Introduction603.6.2 Hardware Effects603.6.3 Summary60Figure 3-4: Program Flow603.6.4 New Registers603.6.5 New Instructions603.6.5.1 Both60Table 3-24: New Instructions for Both Devices60Table 3-25: XOR Truth Table61Example 3-24:613.6.5.2 PIC1861Table 3-26: New Instructions for PIC1861Example 3-25:623.6.6 Assembly623.6.6.1 Both62Example 3-26:623.6.7 C Language62Example 3-27:623.7 Lesson 6: Debounce633.7.1 Introduction63Figure 3-5: Switch Debouncing633.7.2 Hardware Effects633.7.3 Summary64Example 3-28:643.7.4 New Registers643.7.5 New Instructions643.7.6 Assembly643.7.6.1 Enhanced Mid-range64Example 3-29:643.7.7 PIC18643.7.8 C Language643.8 Lesson 7: Reversible Variable Speed Rotate653.8.1 Introduction653.8.2 Hardware Effects653.8.3 Summary65Figure 3-6: Program Flow for Lesson 7653.8.4 New Registers663.8.5 New Instructions663.8.5.1 PIC1866Table 3-27:66Figure 3-7: Rotate Left without Carry663.8.6 Assembly663.8.6.1 Enhanced Mid-range66Example 3-30:663.8.6.2 PIC1866Example 3-31:673.8.7 C Language673.8.7.1 Both67Example 3-32:673.9 Lesson 8: Pulse-Width Modulation (PWM)683.9.1 Introduction683.9.2 Hardware Effects683.9.3 Summary683.9.4 New Registers683.9.4.1 Both68Table 3-28: New Registers for Both Devices68Figure 3-8: PWM Analysis69Example 3-33:69Equation 3-3: PWM Resolution69Figure 3-9: Small Pulse Width70Figure 3-10: Greater Pulse Width70Table 3-29:703.9.5 Assembly713.9.5.1 Enhanced Mid-range71Example 3-34:71Example 3-35:713.9.5.2 PIC18713.9.5.3 C Language713.10 Lesson 9: Timer0723.10.1 Introduction723.10.2 Hardware Effects723.10.3 Summary723.10.4 New Registers72Table 3-30: Enhanced Mid-range New Register723.10.4.1 PIC1873Table 3-31: New Registers for PIC18733.10.5 Assembly733.10.5.1 PIC1673Example 3-36:733.10.5.2 PIC18733.10.6 C Language733.11 Lesson 10: Interrupts and Pull-ups743.11.1 Introduction743.11.2 Hardware Effects743.11.3 Summary743.11.3.1 Interrupts74Figure 3-11: Summary of Interrupt Flow743.11.3.2 Weak Pull-ups75Figure 3-12: Weak Pull-up Diagram75Equation 3-4:753.11.4 New Registers763.11.4.1 Both76Table 3-32: New Registers for Both Devices763.11.4.2 Enhanced Mid-range76Table 3-33: New Registers for Enhanced mid-range76Figure 3-13: Rising/Falling Edges763.11.4.3 PIC1876Table 3-34: New Registers for PIC18763.11.5 New Instructions773.11.5.1 Both77Table 3-35: New Instructions for Both Devices773.11.6 Assembly773.11.6.1 Both77Example 3-37:773.11.6.2 Enhanced mid-range77Example 3-38:77Example 3-39:77Example 3-40:783.11.6.3 PIC1878Example 3-41:78Example 3-42:783.11.7 C Language783.12 Lesson 11: Indirect Addressing793.12.1 Introduction79Figure 3-14: Moving Average with Indirect Addressing793.12.2 Hardware Effects793.12.3 Summary793.12.3.1 Inherent and Literal803.12.3.2 Direct Addressing803.12.3.3 Indirect Addressing803.12.4 New Registers813.12.4.1 Both81Table 3-36: New Registers for Both Devices81Figure 3-15: Enhanced Mid-Range Indirect/Direct Addressing813.12.5 New Instructions813.12.5.1 Both81Table 3-37: New Instructions for Both Devices813.12.6 Assembly Language823.12.6.1 Both82Example 3-43:82Figure 3-16: Before FilterInit Is Called82Figure 3-17: After FilterInit is Called82Equation 3-5:833.12.7 C language833.12.7.1 Both83Example 3-44:83Example 3-45:833.13 Lesson 12: Look-up Table843.13.1 Intro84Equation 3-6:843.13.2 Hardware Effects843.13.3 Summary843.13.4 New Registers843.13.4.1 Both84Table 3-38: New Registers for Both Devices84Figure 3-18: Five situations for the loading of the PC on the Enhanced mid-range core853.13.5 New Registers863.13.5.1 Enhanced Mid-range86Table 3-39: New Registers for Enhanced Mid-range863.13.5.2 PIC1886Table 3-40: New Registers for PIC18863.13.6 New Instructions:873.13.6.1 Both:87Table 3-41: New Instructions for Both Devices873.13.6.2 Enhanced Mid-range87Table 3-42: New Instructions for Enhanced Mid-range873.13.6.3 PIC18:87Table 3-43: New Instructions for PIC1887Figure 3-19: Table Pointer Used to Read One Byte of Data – Answer is reflected in ‘TABLAT’883.13.7 Assembly Language883.13.7.1 Enhanced Mid-range88Example 3-46:89Example 3-47:89Example 3-48:89Example 3-49:903.13.7.2 PIC18903.13.7.3 Program Counter91Example 3-50:913.13.7.4 Table Read91Example 3-51:91Example 3-52:913.13.8 C Language913.13.8.1 Both91Example 3-53:92Figure 3-20: Declared as a Constant92Figure 3-21: Not Declared as a Constant92Example 3-54:923.14 Lesson 13: EEPROM933.14.1 Introduction933.14.2 Hardware Effects933.14.3 Summary93Figure 3-22: Program Flow933.14.4 New Registers943.14.4.1 Both94Table 3-44: New Registers for Both Devices943.14.5 New Instructions943.14.5.1 Both94Table 3-45: New Instructions for Both Devices943.14.6 Assembly Language943.14.6.1 Both94Example 3-55:953.14.7 C Language953.14.7.1 Both95Example 3-56:95Figure A-1: Low Pin Count Board Schematic97A.1 Useful MPLAB® X Shortcuts98A.2 Finding Register Names98A.3 PIC MCU Assembly Coding Practices:98Example A-1:99Worldwide Sales101크기: 1.47메가바이트페이지: 101Language: English매뉴얼 열기