데이터 시트 (CDCLVP1212EVM)차례Low Additive Phase Noise Clock Buffer Evaluation Board11 General Description22 Signal Path and Control Circuitry23 Getting Started23.1 Power-Supply Connections24 Input Clock Selection24.1 Configuring Single-ended Input25 Output Clock36 Schematics and Layout3Important Notices6크기: 575킬로바이트페이지: 7Language: English매뉴얼 열기
