데이터 시트 (TPS62361BEVM-655)차례TPS6236xEVM-65511 Introduction21.1 Requirements21.2 Performance Specification Summary22 Setup32.1 Connector/Jumper Descriptions32.1.1 J1 – VIN32.1.2 J2 – S+/S-32.1.3 J3 – GND32.1.4 J4 – VOUT32.1.5 J5 – SNS+/SNS-32.1.6 J6 – GND32.1.7 J7 – VOUT/GND Terminal Block32.1.8 J8 – I2C Connection from USB-TO-GPIO Adaptor32.1.9 J9 – I2C Monitor Point and Alternate Connection42.1.10 J10 – Load Step Signal Input42.1.11 JP1 – VDD Control42.1.12 JP2 – VSEL042.1.13 JP3 – VSEL142.1.14 JP4 – EN42.2 Software Setup42.3 Hardware Setup53 Software Setup and Operation64 Circuit Use and Modifications84.1 Load Step Circuit84.2 Output Voltage Buffer84.3 Circuit Modifications84.3.1 Output Capacitors84.3.2 Input Capacitors84.3.3 I2C Pull-up Resistors85 Test Results96 Board Layout147 Schematic and Bill of Materials177.1 Schematic177.2 Bill of Materials187.3 Related Documentation From Texas Instruments18Important Notices19크기: 1000킬로바이트페이지: 20Language: English매뉴얼 열기
