Renesas SH7709S Manual Do Utilizador

Rev. 5.00, 09/03, page 227 of 760

Data enable 3

WE3

/DQMUU/

ICIOWR

O

When memory other than synchronous DRAM and
PCMCIA is used, D31–D24 write strobe signal.
When synchronous DRAM is used, selects D31–
D24. When PCMCIA is used, strobe signal
indicating I/O write.

Read

RD

O

Strobe signal indicating read cycle

Wait

WAIT

I

Wait state request signal

Clock enable

CKE

O

Clock enable control signal for synchronous DRAM

IOIS16

IOIS16

I

Signal indicating PCMCIA 16-bit I/O.  Valid only in
little-endian mode.

Bus release
request

BREQ

I

Bus release request signal

Bus release
acknowledgment

BACK

O

Bus release acknowledge signal

Mask ROM chip
select

MCS[0]

–

 MCS[7]

O

Chip select signal for mask ROM connected to area
0 or 2.