Renesas SH7709S Manual Do Utilizador

Rev. 5.00, 09/03, page 557 of 760

Figures 17.2 to 17.4 show the IrDA I/O port pins.

SCIF pin I/O and data control is performed by bits 7 to 4 of SCPCR and bits 3 and 2 of SCPDR.
For details, see section 14.2.8, SC Port Control Register (SCPCR)/SC Port Data Register
(SCPDR).

Internal data bus

Output enable

Clock input enable

IrDA

Serial clock output

Serial clock input

R

SCP3MD0

PCRW

Reset

C

Q

Q

D

R

SCP3MD1

PCRW

Reset

C

Q

D

R

SCP3DT1

PDRW

Reset

SCPT[3]/SCK1

C

D

PDRW:

Legend

SCPDR write

PDRR:

PCRW:

SCPDR read
SCPCR write

PDRR

*

Note:  

*  When reading the SCK1 pin, the CKE1 and CKE0 bits in SCSCR to 0, and 

set the SCP3MD1 bit in SCPCR to 1 (see section 14.2.8, SC Port Control 
Register (SCPCR)/SC Port Data Register (SCPDR)).