Renesas SH7709S Manual Do Utilizador
Rev. 5.00, 09/03, page 48 of 760
Instruction
Operation
Code
Privileged
Mode
Mode
Cycles T Bit
LDC.L @Rm+,
R6_BANK
(Rm)
→
R6_BANK,
Rm + 4
→
Rm
0100mmmm11100111
√
5
—
LDC.L @Rm+,
R7_BANK
(Rm)
→
R7_BANK,
Rm + 4
→
Rm
0100mmmm11110111
√
5
—
LDS
Rm,MACH
Rm
→
MACH
0100mmmm00001010
—
1
—
LDS
Rm,MACL
Rm
→
MACL
0100mmmm00011010
—
1
—
LDS
Rm,PR
Rm
→
PR
0100mmmm00101010
—
1
—
LDS.L @Rm+,MACH
(Rm)
→
MACH, Rm + 4
→
Rm
0100mmmm00000110
—
1
—
LDS.L @Rm+,MACL
(Rm)
→
MACL, Rm + 4
→
Rm
0100mmmm00010110
—
1
—
LDS.L @Rm+,PR
(Rm)
→
PR, Rm + 4
→
Rm
0100mmmm00100110
—
1
—
LDTLB
PTEH/PTEL
→
TLB
0000000000111000
√
1
—
NOP
No operation
0000000000001001
—
1
—
PREF
@Rm
(Rm)
→
cache
0000mmmm10000011
—
2
—
RTE
Delayed branch,
SSR
SSR
→
SR, SPC
→
PC
0000000000101011
√
4
—
SETS
1
→
S
0000000001011000
—
1
—
SETT
1
→
T
0000000000011000
—
1
1
SLEEP
Sleep
0000000000011011
√
4
*
—
STC
SR,Rn
SR
→
Rn
0000nnnn00000010
√
1
—
STC
GBR,Rn
GBR
→
Rn
0000nnnn00010010
—
1
—
STC
VBR,Rn
VBR
→
Rn
0000nnnn00100010
√
1
—
STC
SSR,Rn
SSR
→
Rn
0000nnnn00110010
√
1
—
STC
SPC,Rn
SPC
→
Rn
0000nnnn01000010
√
1
—
STC
R0_BANK,Rn
R0_BANK
→
Rn
0000nnnn10000010
√
1
—
STC
R1_BANK,Rn
R1_BANK
→
Rn
0000nnnn10010010
√
1
—
STC
R2_BANK,Rn
R2_BANK
→
Rn
0000nnnn10100010
√
1
—
STC
R3_BANK,Rn
R3_BANK
→
Rn
0000nnnn10110010
√
1
—
STC
R4_BANK,Rn
R4_BANK
→
Rn
0000nnnn11000010
√
1
—
STC
R5_BANK,Rn
R5_BANK
→
Rn
0000nnnn11010010
√
1
—
STC
R6_BANK,Rn
R6_BANK
→
Rn
0000nnnn11100010
√
1
—
STC
R7_BANK,Rn
R7_BANK
→
Rn
0000nnnn11110010
√
1
—
STC.L SR,@
–
Rn
Rn–4
→
Rn, SR
→
(Rn)
0100nnnn00000011
√
2
—
STC.L GBR,@
–
Rn
Rn–4
→
Rn, GBR
→
(Rn)
0100nnnn00010011
—
2
—
STC.L VBR,@
–
Rn
Rn–4
→
Rn, VBR
→
(Rn)
0100nnnn00100011
√
2
—
Note:
*
The number of cycles until the sleep state is entered.