HGST Travelstar 7K500 BE, 320GB 0A79103 Manual Do Utilizador
Códigos do produto
0A79103
7K500 OEM Specification
Page 49 of 176
11.7
11.7
11.7
11.7 LBA High Register
LBA High Register
LBA High Register
LBA High Register
This register contains Bits 16-23. At the end of the command, this register is updated to reflect the
current LBA Bits 16-23.
current LBA Bits 16-23.
When 48-bit addressing commands are used, the “most recently written” content contains LBA Bits
16-23, and the “previous content” contains Bits 40-47. The 48-bit Address feature set is described in
“12.13 48-bit Address Feature Set”.
16-23, and the “previous content” contains Bits 40-47. The 48-bit Address feature set is described in
“12.13 48-bit Address Feature Set”.
11.8
11.8
11.8
11.8 LBA Low Register
LBA Low Register
LBA Low Register
LBA Low Register
This register contains Bits 0-7. At the end of the command, this register is updated to reflect the
current LBA Bits 0-7.
current LBA Bits 0-7.
When 48-bit commands are used, the “most recently written” content contains LBA Bits 0-7, and the
“previous content” contains Bits 24-31.
“previous content” contains Bits 24-31.
11.9
11.9
11.9
11.9 LBA Mid Register
LBA Mid Register
LBA Mid Register
LBA Mid Register
This register contains Bits 8-15. At the end of the command, this register is updated to reflect the
current LBA Bits 8-15.
current LBA Bits 8-15.
When 48-bit addressing commands are used, the “most recently written” content contains LBA Bits
8-15, and the “previous content” contains Bits 32-39.
8-15, and the “previous content” contains Bits 32-39.
11.10
11.10
11.10
11.10 Sector Count Register
Sector Count Register
Sector Count Register
Sector Count Register
This register contains the number of sectors of data requested to be transferred on a read or write
operation between the host and the device. If the value in the register is set to 0, a count of 256
sectors (in 28-bit addressing) or 65,536 sectors (in 48-bit addressing) is specified.
operation between the host and the device. If the value in the register is set to 0, a count of 256
sectors (in 28-bit addressing) or 65,536 sectors (in 48-bit addressing) is specified.
If the register is zero at command completion, the command was successful. If not successfully
completed, the register contains the number of sectors which need to be transferred in order to
complete the request.
completed, the register contains the number of sectors which need to be transferred in order to
complete the request.
The contents of the register are defined otherwise on some commands. These definitions are given in
the command descriptions.
the command descriptions.
11.11
11.11
11.11
11.11 Status Register
Status Register
Status Register
Status Register
Status Register
7
6
5
4
3
2
1
0
BSY
DRDY
DF
DSC
DRQ
CORR
IDX
ERR
Table 28 Status Register
This register contains the device status. The contents of this register are updated whenever an error
occurs and at the completion of each command.
occurs and at the completion of each command.
If the host reads this register when an interrupt is pending, it is considered to be the interrupt
acknowledge. Any pending interrupt is cleared whenever this register is read.
acknowledge. Any pending interrupt is cleared whenever this register is read.
If BSY=1, no other bits in the register are valid.
Bit Definitions
BSY
Busy. BSY=1 whenever the device is accessing the registers. The host should not read or
write any registers when BSY=1. If the host reads any register when BSY=1, the contents of
the Status Register will be returned.
write any registers when BSY=1. If the host reads any register when BSY=1, the contents of
the Status Register will be returned.