Fujitsu F2MC-8FX Manual Do Utilizador
13
CHAPTER 2 MEMORY SPACE
2.2.3
Arrangement of 16-bit Data in Memory Space
The F
2
MC-8FX CPU can perform 16-bit data transfer and arithmetic operation though it
is an 8-bit CPU. Arrangement of 16-bit data in the memory space is shown below.
■
Arrangement of 16-bit Data in Memory Space
As shown in Figure 2.2-5, the F
2
MC-8FX CPU treats 16-bit data in the memory as upper data if it is
written at the first location having a lower address and as lower data if it is written at the next location after
that.
Figure 2.2-5 Arrangement of 16-bit Data in Memory
As when 16 bits are specified by the operand during the execution of an instruction, bytes are assumed to
be upper and lower in the order of their proximity to the OP code. This applies when the operand indicates
the memory address and 16-bit immediate data as shown in Figure 2.2-6.
Figure 2.2-6 Arrangement of 16-bit Data during Instruction Execution
The same may also apply to data saved in the stack by interrupts.
ABCF
H
ABCF
H
ABCE
H
34
H
ABCE
H
ABCD
H
12
H
ABCD
H
ABCC
H
ABCC
H
Before execution
MEMORY
MEMORY
After execution
A
A
1234
H
1234
H
MOVW ABCDH, A
[Example]
MOV A, 5678H
;
Extended address
MOVWA, #1234H
;
16-bit immediate data
Assembled
:.
:.
:.
XXXX
H
XX XX
;
Extended address
XXXX
H
60 56 78
;
16-bit immediate data
XXXX
H
E4 12 34
XXXX
H
XX
:.