Fujitsu FR81S Manual Do Utilizador
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
6. Operation of CSIO
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
241
6.3. Setup Procedure and Program Flow
Setup procedure and program flow is shown.
CPU Interconnection
Figure 6-31 Example of Connection between CSIO Chips
Flowchart
Figure 6-32 Flowchart Example
FIFO Unused
(Master side)
Start
Operating format
setting
Sets 1-byte data to
TDR for communication
TDR for communication
RDRF=1
Reading and processing
of reception data
(Slave side)
Data
transmission
Start
RDRF=1
Reading and processing
of reception data
1-byte data transmission
Yes
Yes
No
No
Data
transmission
transmission
(ANS)
Operating format setting
(the same setting as
the master side)
SOT
SIN
SCK
SOT
SIN
SCK
CPU_1 (Master)
CPU_2 (Slave)
MB91520 Series
MN705-00010-1v0-E
1554