Fujitsu FR81S Manual Do Utilizador
CHAPTER 45: FLASH MEMORY
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : FLASH MEMORY
FUJITSU SEMICONDUCTOR CONFIDENTIAL
26
5.1.1. Configuring CPU-ROM Mode
Configuring CPU-ROM mode is shown below.
When the FWE bit of the flash control register (FCTLR) is "0", it is CPU-ROM mode. When the FRDY bit
of the flash status register (FSTR) is "1", read from the flash memory is enabled in this mode. In the mode,
write to the flash memory is disabled. After released reset, the mode will be the CPU-ROM mode.
MB91520 Series
MN705-00010-1v0-E
1947