Fujitsu FR81S Manual Do Utilizador
CHAPTER 23: 32-BIT INPUT CAPTURE
8. Sample Program
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 32-BIT INPUT CAPTURE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
32
8. Sample Program
This section explains the sample program of the 32-bit input capture.
Setting procedure example 1
Detect the rising edge of the pulse for input to ICU4 and record the value of
free-run timer.
This process is repeated twice to measure the time from one trigger to
another. However, reading and calculation of the capture value are to be
handled as interrupt processes.
1. Initial setting
-Free-run timer ch.3 control Register name.Bit.name
Detect the rising edge of the pulse for input to ICU4 and record the value of
free-run timer.
This process is repeated twice to measure the time from one trigger to
another. However, reading and calculation of the capture value are to be
handled as interrupt processes.
1. Initial setting
-Free-run timer ch.3 control Register name.Bit.name
Control register setting
Clock selection>>
Compare interrupt request flag>>
Compare interrupt request enable>>
Counting operation>>
TCDT clear
Count clock>>
Clock selection>>
Compare interrupt request flag>>
Compare interrupt request enable>>
Counting operation>>
TCDT clear
Count clock>>
TCCS3
.ECKE
.ICLR
.ICRE
.STOP
.SCLR
.CLK3-0
.ECKE
.ICLR
.ICRE
.STOP
.SCLR
.CLK3-0
Timer data value setting
TCDT3
-Port Register name.Bit name
Port ICU4 input setting
See "CHAPTER: I/O
PORTS".
PORTS".
-Input capture control Register name.Bit name
Control register setting
Interrupt request flag>>
Interrupt request enabled>>
ch.5 Effective edge polarity selection>>
ch.4
Interrupt request flag>>
Interrupt request enabled>>
ch.5 Effective edge polarity selection>>
ch.4
Effective edge polarity selection>>
ICS45
.ICP5,ICP4
.ICE5,ICE4
.EG51,EG50
.EG41,EG40
.ICP5,ICP4
.ICE5,ICE4
.EG51,EG50
.EG41,EG40
-Interrupt-related Register name.Bit name
Sets an interrupt level.
ICR36
I flag setting
(CCR)
-Variable setting
2. Activation
-Input capture ch.4 activation Register name.Bit name
2. Activation
-Input capture ch.4 activation Register name.Bit name
Interrupt control
ICS45.ICE4
-Free-run timer ch.3 activation Register name.Bit name
Count operation activation
TCCS3.STOP
3. Interrupt
-Interrupt processing Register name.Bit name
Clearing of interrupt request flag
ICS45.ICP4
(Any process)
......
4. Interrupt vector
-Vector table setting
(Note)
Clock-related settings and the setting of __set_il (numeric value) need to be
configured in advance. See “CHAPTER: CLOCK” and “CHAPTER:
INTERRUPTS CONTROL (INTERRUPTS CONTROLLER)”.
Program example 1
void INPUT0_sample_1(void)
{
void INPUT0_sample_1(void)
{
freerun0_initial();
INPUT4_initial();
INPUT4_start();
freerun0_start();
INPUT4_initial();
INPUT4_start();
freerun0_start();
}
void freerun0_initial(void)
{
void freerun0_initial(void)
{
IO_TCCS3.word = 0x0041;
/* Setting value=0000_0000_0100_0001 */
/* bit15 = 0 ECKE internal clock source */
/* bit14 -10 =0 Reserved bit */
/* bit9 = 0 Interrupt flag clear */
/* bit8 = 0 Interrupt disabled */
/* bit7 = 0 Reserved bit */
/* bit6 = 1 */
/* bit5 = 0 Reserved bit */
/* bit4 = 0 */
/* bit3-0 = 0001 */
IO_TCDT3 = 0x0000;
/* Initialization of timer data value */
}
void INPUT4_initial(void)
{
void INPUT4_initial(void)
{
PORT_SETTING_ICU4_IN(); /* Set the ICU0 pin for peripheral input. */
IO_ICS45.byte = 0x01;
IO_ICS45.byte = 0x01;
/* Setting value=0000_0001 */
/* bit7 to 6 = 00 ICP5,4, 0 Interrupt request flag clear */
/* bit5 to 4 = 00 ICE5,4, 0 Interrupt disabled */
/* bit3 to 2 = 00 EG51, EG50 ch.5 No edge detected */
/* bit1 to 0 = 01 EG41, EG40 ch.4 Rising edge detected */
IO_ICR[36].byte = 0x10;
/* Input capture ch.4 interrupt level setting (any value) */
__EI();
/* Interrupt enabled */
count = 0;
}
void INPUT4_start(void)
{
void INPUT4_start(void)
{
IO_ICS45.bit.ICE4 = 1;
/* bit4 = 1 ICE45 ch.4 Interrupt enabled */
}
void freerun3_start(void)
{
void freerun3_start(void)
{
IO_TCCS3.bit.STOP = 0;
/* bit6 = 0 STOP count enabled */
}
__interrupt void INPUT4_int(void)
{
__interrupt void INPUT4_int(void)
{
IO_ICS45.bit.ICP4 = 0;
/* bit6 = 0 Clearing of ICP4 effective edge detection flag */
} count++;
Specification of interrupt routine required in vector table
#pragma intvect INPUT4_int 52
Specification of interrupt routine required in vector table
#pragma intvect INPUT4_int 52
MB91520 Series
MN705-00010-1v0-E
907