AMD 250 Manual Do Utilizador
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368
Index
25112
Rev. 3.06
September 2005
Software Optimization Guide for AMD64 Processors
M
memory
MMX™ instructions
MOVZX and MOVSX instructions 153
multiplication
multiplication
muxing constructs 136
N
Nonuniform Memory Access 96
O
operands
largest possible operand size, repeated string 168
P
population-count function 179
prefetch
prefetch
R
S
scalar code translated into 3DNow! code 138
scheduling 144
SHLD instruction 85
SHR instruction 85
single-byte near-return RET instruction (opcode C3h) 128
SSE 193, 355
SSE2 193, 355
scheduling 144
SHLD instruction 85
SHR instruction 85
single-byte near-return RET instruction (opcode C3h) 128
SSE 193, 355
SSE2 193, 355
stack
alignment considerations 122
store-to-load forwarding 20, 22, 100–103
String Instructions 167
string instructions 167
structure (struct) 41, 117, 119
subexpressions, explicitly extract common 37
superscalar processor 251
switch statement 25, 28, 33
String Instructions 167
string instructions 167
structure (struct) 41, 117, 119
subexpressions, explicitly extract common 37
superscalar processor 251
switch statement 25, 28, 33
U
W
X
XOR instruction 169