Motorola MVME5100 Manual Do Utilizador
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PCI Arbitration
http://www.motorola.com/computer/literature
4-3
4
8259 Interrupts
There are 15 interrupt requests supported by the Peripheral Bus Controller
(PBC), which is only available if an IPMC761 or IPMC712 is installed.
These 15 interrupts are ISA-type interrupts that are functionally equivalent
to two 82C59 interrupt controllers. Except for IRQ0, IRQ1, IRQ2,
IRQ8_, and IRQ13, each of the interrupt lines can be configured for either
edge-sensitive mode or level-sensitive mode by programming the
appropriate ELCR registers in the PBC.
(PBC), which is only available if an IPMC761 or IPMC712 is installed.
These 15 interrupts are ISA-type interrupts that are functionally equivalent
to two 82C59 interrupt controllers. Except for IRQ0, IRQ1, IRQ2,
IRQ8_, and IRQ13, each of the interrupt lines can be configured for either
edge-sensitive mode or level-sensitive mode by programming the
appropriate ELCR registers in the PBC.
There is also support for four PCI interrupts, PIRQA_ through PIRQD_.
The PBC has four PIRQ route control registers to allow each of the PCI
interrupt lines to be routed to any of twelve ISA interrupt lines (IRQ0,
IRQ2, IRQ8_, and IRQ13 are reserved for ISA system interrupts). These
active low inputs are used for some of the on-board PCI devices.
The PBC has four PIRQ route control registers to allow each of the PCI
interrupt lines to be routed to any of twelve ISA interrupt lines (IRQ0,
IRQ2, IRQ8_, and IRQ13 are reserved for ISA system interrupts). These
active low inputs are used for some of the on-board PCI devices.
Since PCI interrupts are defined as level-sensitive, software must program
the selected IRQ(s) for level-sensitive mode. The assignments of the ISA
interrupts supported by the PBC as shown in the following table:
the selected IRQ(s) for level-sensitive mode. The assignments of the ISA
interrupts supported by the PBC as shown in the following table:
Table 4-2. PBC ISA Interrupt Assignments
PRI
PSIO
IRQ
Input
Routed to
ISA
IRQ
Co
n
tr
o
ller
Edge/
Level
Po
larity
Interrupt Source
No
tes
1
IRQ0
INT1
Edge
High
Timer 1 / Counter 0
1
2
MSK/
IRQ1
IRQ1
Edge
High
Not Used
3-10
IRQ2
Edge
High
Cascade Interrupt from
INT2
INT2
3
RTCX1/
IRQ8_
IRQ8_
INT2
Edge
Low
ABORT Switch, RTC
4
IRQ9
Level
Low
Watch Dog 1/2
5
PIRQA_
IRQ10
Level
Low
LAN (on front)
6
IRQ11
Level
Low
Internal USB controller
2
7
MSDT/
IRQ12
IRQ12
Edge
High
Not Used
8
PIRQC_
IRQ13
LAN (to rear)