Motorola MVME5100 Manual Do Utilizador
IN-1
Index
Numerics
A
A0-A31
AACK
as used with PPC Slave
access timing (ROM)
address
Address Parity Error Address Register
Address Parity Error Log Register
SMC
data stepping
decoders PCI to PPC
decoders PPC to PCI
mapping PPC
modification for little endian transfers
offsets, as part of map decoders
parity PPC60x
pipelining
addressing
mode for PCI Master
to PCI Slave
addressing mode
PCI Slave limits
arbiter
Hawk’s internal
PPC
arbitration
from PCI Master
latency
parking
architectural overview
ARTRY_
B
bit ordering convention
Hawk used with SDRAM
block diagrams
Hawk with SDRAMs
Board Last Reset Register
bridge
burst write bandwidth
Bus Clock Frequency
bus cycle types
Bus Hog
PPC master device
bus interface (60x)
to SMC