Renesas M16C/6NK Manual Do Utilizador

Rev.1.10    Jul 01, 2005    page 249 of 318
REJ09B0124-0110

M16C/6N Group (M16C/6NK, M16C/6NM)

20. Flash Memory Version

This document is under development and its contents are subject to change.

Write commands and data to even addresses in the user ROM area.

When entering wait mode, set the FMR01 bit in the FMR0 register to “0” (CPU rewrite mode disabled)

before executing the WAIT instruction.

When entering stop mode, the following settings are required:

• Set the FMR01 bit to “0” (CPU rewrite mode disabled). Disable DMA transfer before setting the CM10

bit to “1” (stop mode).

• Execute the instruction to set the CM10 bit to “1” (stop mode) and then the JMP.B instruction.

Example program

BSET

0, CM1

; Stop mode

JMP.B

L1

L1:

Program after exiting stop mode

If the CM05 bit is set to “1” (main clock stopped), do not execute the following commands:

• Program

• Block erase

• Erase all unlocked blocks

• Lock bit program software command

• Read lock bit status