Jameco Electronics 3000 Manual Do Utilizador

The Rabbit (and the Z80/Z180) processor has two accumulators—the A register serves as 
an 8-bit accumulator for 8-bit operations such as 

 or 

. The 16-bit register HL regis-

ter serves as an accumulator for 16-bit operations such as 

, which adds the 16-

bit register DE to the 16-bit accumulator HL. For many operations IX or IY can substitute 
for 

 as accumulators.

The register marked F is the flags register or status register. It holds a number of flags that 
provide information about the last operation performed. The flag register cannot be 
accessed directly except by using the 

 and 

 instructions. Normally the 

flags are tested by conditional jump instructions. The flags are set to mark the results of 
arithmetic and logic operations according to rules that are specified for each instruction. 
There are four unused read/write bits in the flag register that are available to the user via 
the 

 and 

 instructions. These bits should be used with caution since new-

generation Rabbit processors could use these bits for new purposes.

The registers IX, IY and HL can also serve as index registers. They point to memory 
addresses from which data bits are fetched or stored. Although the Rabbit can address a 
megabyte or more of memory, the index registers can only directly address 64K of mem-
ory (except for certain extended addressing 

 instructions). The addressing range is 

expanded by means of the memory mapping hardware (see “Memory Mapping” on 
page 23) and by special instructions. For most embedded applications, 64K of data mem-
ory (as opposed to code memory) is sufficient. The Rabbit can efficiently handle a mega-
byte of program space.

The register SP points to the stack that is used for subroutine and interrupt linkage as well 
as general-purpose storage.

A feature of the Rabbit (and the Z80/Z180) is the alternate register set. Two special 
instructions swap the alternate registers with the regular registers. The instruction 

 

exchanges the contents of AF with AF'. The instruction 

 exchanges HL, DE, and BC 

with HL', DE', and BC'. Communication between the regular and alternate register set in 
the original Z80 architecture was difficult because the exchange instructions provided the 
only means of communication between the regular and alternate register sets. The Rabbit 
has new instructions that greatly improve communication between the regular and alter-
nate register set. This effectively doubles the number of registers that are easily available 
for the programmer’s use. It is not intended that the alternate register set be used to pro-
vide a separate set of registers for an interrupt routine, and Dynamic C does not support 
this usage because it uses both registers sets freely.

The IP register is the interrupt priority register. It contains four 2-bit fields that hold a his-
tory of the processor’s interrupt priority. The Rabbit supports four levels of processor pri-
ority, something that exists only in a very restricted form in the Z80 or Z180.