Toshiba A1 Manual Do Utilizador

Subtest 05 

L2 Cache Memory 

To test the L2 cache memory, a pass-through write-read comparison of ‘5A’ 
data is run repeatedly to the test area (‘7000’:’Program’ size to ‘7000’:’7FFF’ 
(32 KB)) to check the hit-miss ratio (on/off status) for L2 cache memory.  

Number of misses 

< Number of hits → OK 

Number of misses 

≥ Number of hits → Fail 

Subtest 06 

Stress  

 

Data (from 1MB to the maximum MB) is written from the 16KB write buffer 
to the 16KB read buffer and compared the data in the buffers. The read buffer 
starts from 0001 and the comparison is continued with the following read 
buffer addresses: 0001, 0003, 0005, 0007, 0009, 000b, 000d and 000f.