Kenwood TK-7150 Manual Do Utilizador

TK-7150

1,2,12,15,

NC1~NC18

-

Not used (No connect)

35~38,

71~74,80,

90,110,126,

143,144

6,58,69,81,

HD0~HD7

I/O

HPI data bus

95,120,124,

135

5,7~11,105,

A0~A19

O

Not used (No connect)

107~109,

131~134,

136~141,

13

HAS

I

HPI address strobe (Pull up)

17

HCS

I

HPI chip select

18

HR/W

I

HPI read/write

19

READY

I

Data ready (Pull up)

20

PS

O

Not used (No connect)

21

DS

O

Not used (No connect)

22

IS

O

Not used (No connect)

23

R/W

O

Not used (No connect)

24

MSTRB

O

Not used (No connect)

25

IOSTRB

O

Not used (No connect)

26

MSC

O

Not used (No connect)

27

XF

O

CODEC control

(H : power down, L : active)

28

HOLDA

-

Not used (No connect)

29

IAQ

-

Not used (No connect)

30

HOLD

I

Hold (Pull up)

31

BIO

I

Serial data synchronize input

32

MP/MC

I

Not used (Pull down)

39

HCNTL0

I

HPI control 0

41

BCLKR0

I

Receive clock output (SCLK : 614.4kHz)

42

BCLKR1

-

Master clock output (MCLK : 4.9152MHz)

43

BFSR0

I

Frame sync. for receiver output

(LRCK : 19.2kHz)

44

BFSR1

I

Not used (No connect)

45

BDR0

I

Serial data receive input

46

HCNTL1

I

HPI control 1

47

BDR1

-

Not used (No connect)

48

BCLKX0

I

Transmit clock input (SCLK : 614.4kHz)

49

BCLKX1

O

Not used (No connect)

51

HINT/TOUT1

O

Interrupt for Host CPU/Boot mode

select (Pull up)

53

BFSX0

I

Frame sync.for transmitter input

(LRCK : 19.2kHz)

54

BFSX1

I

Not used (No connect)

55

HRDY

-

Not used (No connect)

59

BDX0

O

Serial data transmit output

60

BDX1

-

Not used (No connect)

61

IACK

-

Not used (No connect)

62

HBIL

I

Byte identification (HPI)

63

NMI

I

Not used (Pull up)

64

INT0

I

Command interrupt from Host CPU

65

INT1

I

Not used (Pull up)

66

INT2

I

Boot mode select (Pull up)

67

INT3

I

Not used (Pull up)

77

CLKMD1

I

Clock mode select (Pull down)

78

CLKMD2

I

Clock mode select (Pull up)

79

CLKMD3

I

Clock mode select (Pull down)

82

TOUT0

-

Not used (No connect)

83

EMU0

I/O

Emulator 0 (to JTAG connector)

84

EMU1/OFF I/O

Emulator 1 (to JTAG connector)

85

TDO

O

Test data output (to JTAG connector)

86

TDI

I

Test data input (to JTAG connector)

87

TRST

I

Test reset (to JTAG connector)

88

TCK

I

Test clock (to JTAG connector)

89

TMS

I

Test mode select (to JTAG connector)

92

HPIENA

I

Not used (Pull up)

94

CLKOUT

O

Not used (No connect)

96

X1

-

12.288MHz (System clock)

97

X2/CLKIN

-

12.288MHz (System clock)

98

RS

I

DSP reset input

99~104,

D0~D15

-

Not used (No connect)

113~119,

121~123

127

HDS1

I

HPI data strobe1 (Pull up)

129

HDS2

I

HPI data strobe2 (Pull down)

3,14,34,40,

Vss

-

GND

50,57,70,

76,93,106,

111,128

4,33,56,

DVDD

-

VDD for I/O pins (+3.3V)

75,112,130

16,52,68,

CVDD

-

VDD for core CPU (+1.8V)

91,125,142