Renesas R5S72625 Manual Do Utilizador

 

 

Section 11   Multi-Function Timer Pulse Unit 2 
 

Page 442 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

0, 3, 4 

0 

0 

0 

TCNT clearing disabled  

 

 

 

1 

TCNT cleared by TGRA compare match/input 
capture 

 

 

1 

0 

TCNT cleared by TGRB compare match/input 
capture 

 

 

 

1 

TCNT cleared by counter clearing for another 
channel performing synchronous clearing/ 
synchronous operation*

1

 

  1 0 0 TCNT 

clearing 

disabled 

 

 

 

1 

TCNT cleared by TGRC compare match/input 
capture*

2

 

 

 

1 

0 

TCNT cleared by TGRD compare match/input 
capture*

2

 

 

 

 

1 

TCNT cleared by counter clearing for another 
channel performing synchronous clearing/ 
synchronous operation*

1

 

Notes:  1.  Synchronous operation is set by setting the SYNC bit in TSYR to 1. 

 

2.  When TGRC or TGRD is used as a buffer register, TCNT is not cleared because the 

buffer register setting has priority, and compare match/input capture does not occur. 

 

1, 2 

0 

0 

0 

TCNT clearing disabled 

 

 

 

1 

TCNT cleared by TGRA compare match/input 
capture 

 

 

1 

0 

TCNT cleared by TGRB compare match/input 
capture 

 

 

 

1 

TCNT cleared by counter clearing for another 
channel performing synchronous clearing/ 
synchronous operation*

1

 

Notes:  1.  Synchronous operation is selected by setting the SYNC bit in TSYR to 1. 

 

2.  Bit 7 is reserved in channels 1 and 2. It is always read as 0 and cannot be modified.