Renesas R5S72623 Manual Do Utilizador
Section 4 Boot Mode
Page 112 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
(a) A search is conducted to find the block which holds the loader program. Block addresses 0 to
1023 (max.)
(b) The 8-KB (16-sector) loader program is read out and transferred to high-speed on-chip RAM.
(c) ECC checking
(d) Error correction (up to four locations)
Once transfer of the loader program has been completed, execution by the CPU jumps to high-
speed on-chip RAM so that it can start executing the transferred loader program.
Once transfer of the loader program has been completed, execution by the CPU jumps to high-
speed on-chip RAM so that it can start executing the transferred loader program.
(3) Transfer of an Application Program (as Desired)
The loader program employs the NAND flash memory controller to transfer the data to be
deployed from NAND flash memory to on-chip RAM or external RAM.
deployed from NAND flash memory to on-chip RAM or external RAM.
Figure 4.2 is a schematic view of the specifications for boot mode 2.
On-chip ROM for boot
initiation (not publicly disclosed)
Loader program
(8 KB)
High-speed on-chip RAM
On-chip RAM
Application
program
External RAM
NAND flash memory
Application
program
Application
program
NAND
flash memory
controller
flash memory
controller
H'FFF8 0000
H'FFF8 1FFF
Read request
(2) (a) Search for the
loader program
loader program
Read
Read request
This LSI
(1) Program execution
(2) (b) Loading into high-
speed on-chip RAM
speed on-chip RAM
(3) Loading into external
or on-chip RAM
or on-chip RAM
Loader program
(8 KB)
(2) (c) ECC checking
(2) (d) Error correction
(up to four
locations)
(8 KB)
(2) (c) ECC checking
(2) (d) Error correction
(up to four
locations)
Figure 4.2 Schematic View of Specification for Boot Mode 2