Renesas R5S72623 Manual Do Utilizador

Página de 2152
 
 
Section 11   Multi-Function Timer Pulse Unit 2 
 
Page 444 of 2108 
 
R01UH0134EJ0400  Rev. 4.00 
 
 Sep 
24, 
2014 
SH7262 Group, SH7264 Group
Table 11.8  TPSC0 to TPSC2 (Channel 2) 
 
Channel 
Bit 2 
TPSC2 
Bit 1 
TPSC1 
Bit 0 
TPSC0 
 
Description 
2 0 0 0 Internal 
clock: 
counts 
on 
P
/1 
 
 
 
Internal clock: counts on P
/4 
 
 
Internal clock: counts on P
/16 
 
 
 
Internal clock: counts on P
/64 
 
External clock: counts on TCLKA pin input 
 
 
 
External clock: counts on TCLKB pin input 
 
 
External clock: counts on TCLKC pin input 
 
 
 
Internal clock: counts on P
/1024 
Note:  This setting is ignored when channel 2 is in phase counting mode. 
 
Table 11.9  TPSC0 to TPSC2 (Channels 3 and 4) 
 
Channel 
Bit 2 
TPSC2 
Bit 1 
TPSC1 
Bit 0 
TPSC0 
 
Description 
3, 4 
Internal clock: counts on P
/1 
 
 
 
Internal clock: counts on P
/4 
 
 
Internal clock: counts on P
/16 
 
 
 
Internal clock: counts on P
/64 
 
Internal clock: counts on P
/256 
 
 
 
Internal clock: counts on P
/1024 
 
 
External clock: counts on TCLKA pin input 
 
 
 
External clock: counts on TCLKB pin input