Renesas R5S72623 Manual Do Utilizador

 

 

Section 18   Serial Sound Interface 

 

 

Page 920 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

This mode allows serial data transmission and reception between this module and another device. 
The clock and word select signals are internally derived from the oversampling clock. The format 
of these signals is defined in the configuration fields of this module. 

All bits related to the SSICR's word length are valid in non-compressed modes. There are many 
configurations this module supports, but the formats described below are I

2

S compatible, MSB-

first left-aligned, and MSB-first right-aligned. 

  I

2

S Compatible Format 

Figures 18.3 and 18.4 demonstrate the supported I

2

S compatible format both without and with 

padding. Padding occurs when the data word length is smaller than the system word length. 

prev. sample MSB

LSB

+ 1

LSB MSB

LSB

+ 1

LSB

next sample

System word 1 =
data word 1

System word 2 =
data word 2

SSISCK

SSIWS

SSIDATA

SCKP = 0, SWSP = 0, DEL = 0, CHNL = 00
System word length = data word length 

 

MSB

LSB

MSB

LSB

Next

System word 1

System word 2

Data word 1

Data word 2

Padding

Padding

SSISCK

SSIWS

SSIDATA

SCKP = 0, SWSP = 0, DEL = 0, CHNL = 00, SPDP = 0, SDTA = 0
System word length > data word length