Renesas R5S72622 Manual Do Utilizador

 
Section 26   USB 2.0 Host/Function Module 

Page 1416 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

7 

SHTNAK 

0 

R/W 

Disable Pipe when Transfer Finishes 

Specifies whether the PID bit is changed to NAK 
when a transfer finishes while the DCP is operating 
in the receive direction. 

0: Continue using pipe after transfer finishes. 

1: Disable pipe when transfer finishes. 

When this bit is set to 1, this module changes the 
PID bit corresponding to the DCP to NAK when it 
determines that a transfer to the DCP has finished. 

This module determines that a transfer has finished 
when a short packet of data (or a zero-length 
packet) is received successfully.  

Change the setting of this bit only when CSSTS = 0 
and PID = NAK. 

Before changing the setting of this bit after 
changing the DCP’s PID bit from BUF to NAK, 
confirm that the values of CSSTS and PBUSY are 
0. However, it is not necessary for this module to 
confirm the state of the PBUSY bit if the value of 
the PID bit has already been changed to NAK. 

6, 5 

 0 

R/W 

Reserved 

These bits are always read as 0. The write value 
should always be 0. 

4 DIR 

0  R/W 

Transfer 

Direction 

When the host controller function is selected, this 
bit sets the transfer direction of data stage. 

0: Data receiving direction 

1: Data transmitting direction 

When the function controller function is selected, 
this bit should be cleared to 0. 

3 to 0 

 All 

0 

R 

Reserved 

These bits are always read as 0. The write value 
should always be 0.