Renesas R5S72622 Manual Do Utilizador

Página de 2152
 
Section 16   Renesas Serial Peripheral Interface 
 
R01UH0134EJ0400  Rev. 4.00  
 
Page 791 of 2108 
Sep 24, 2014 
 
 
 
SH7262 Group, SH7264 Group 
Bit Bit 
Name 
Initial 
Value R/W Description 
SPSLN1 
SPSLN0 
R/W 
R/W 
Sequence Length Specification 
These bits specify a sequence length when this 
module in master mode performs sequential 
operations. This module in master mode changes 
command registers 0 to 3 (SPCMD0 to SPCMD3) to 
be referenced and the order in which they are 
referenced according to the sequence length that is 
set in the SPSLN1 and SPSLN0 bits.  
The relationship among the setting of bits SPSLN1 
and SPSLN0, sequence length, and SPCMD0 to 
SPCMD3 referenced by this module is shown below. 
In slave mode, SPCMD0 is always referenced. 
 Sequence 
 
 
Length 
Referenced SPCMD # 
00: 1 
 0  … 
01: 2 
 1  0  … 
10: 3 
 1  2  0  … 
11: 4 
 1  2  3  0  …