Renesas R5S72622 Manual Do Utilizador

 

 

Section 18   Serial Sound Interface 

 

 

Page 932 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

No

Yes

Yes

No

TUIEN = 1, TOIEN = 1, TIE = 1,
TEN = 1

TEN = 0, 
TUIEN = 0, TOIEN = 0, 
IIEN = 1, TIE = 0

For n = ((CHNL +1) x 2) 

Loop

Use SSI status register bits 

to realign data after 

underflow/overflow.

Start

Release from reset, 

set SSICR configuration bits.

Enable error interrupts

and transmit interrupts,

then enable transmission.

Wait for an interrupt.

Data interrupt?

Load data of channel n.

Next channel

More data to be sent?

Disable transmit operation,* 

disable an error interrupt, 

enable an idle interrupt.

Wait for an idle interrupt 

from this module

End

Define SCKD, SWSD, MUEN, 
DEL, PDTA, SDTA, SPDP, 
SWSP, SCKP, SWL, DWL, 
CHNL

Wait for more than 

1.5 cycles of SSIWS.

Set up an interrupt

controller.

Disable transmit operation.

(TEN = 0)

Wait for more than 

one cycle of SSISCK.

Enable transmit operation agan.

(TEN = 1)

Yes

No

IDST = 1?

Notes:  Transmission may not start if the specified procedure is not followed.
 

  *  When restarting transmission after disabling transmit operation (TEN = 0),

 

    first apply a software reset before going back to start in the flowchart.