Renesas R5S72642 Manual Do Utilizador
Section 33 Power-Down Modes
Page 1780 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
33.2.5
Standby Control Register 5 (STBCR5)
STBCR5 is an 8-bit readable/writable register that controls the operation of modules.
Note: When writing to this register, see section 33.4, Usage Notes.
7
6
5
4
3
2
1
0
Bit:
Initial value:
R/W:
1
1
1
1
1
1
1
R/W
R/W
R/W
R
R/W
R/W
R/W
1
R/W
MSTP
55
MSTP
57
MSTP
56
MSTP
53
MSTP
52
MSTP
50
MSTP
51
-
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
7
MSTP57
1
R/W
Module Stop 57
When the MSTP57 bit is set to 1, the clock supply to
channel 0 of the I
channel 0 of the I
2
C bus interface 3 is halted.
0: Channel 0 of the I
2
C bus interface 3 runs.
1: Clock supply to channel 0 of the I
2
C bus interface 3
is halted.
6
MSTP56
1
R/W
Module Stop 56
When the MSTP56 bit is set to 1, the clock supply to
channel 1 of the I
channel 1 of the I
2
C bus interface 3 is halted.
0: Channel 1 of the I
2
C bus interface 3 runs.
1: Clock supply to channel 1 of the I
2
C bus interface 3
is halted.
5
MSTP55
1
R/W
Module Stop 55
When the MSTP55 bit is set to 1, the clock supply to
channel 2 of the I
channel 2 of the I
2
C bus interface 3 is halted.
0: Channel 2 of the I
2
C bus interface 3 runs.
1: Clock supply to channel 2 of the I
2
C bus interface 3
is halted.
4
1 R
Reserved
This bit is always read as 1. The write value should
always be 1.
always be 1.