Renesas R5S72621 Manual Do Utilizador
Section 7 Interrupt Controller
R01UH0134EJ0400 Rev. 4.00
Page 199 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
F
2 Icyc + 3 Bcyc + 1 Pcyc
3 Icyc + m1 + m2
m1
m2
m3
9 Icyc
IRQ
RESBANK instruction
D
E
E
E
E
E
E
E
E
E
D
E
E
M
M
M
E
F
D
[Legend]
m1:
m2:
m3:
m2:
m3:
Vector address read
Saving of SR (stack)
Saving of PC (stack)
Saving of SR (stack)
Saving of PC (stack)
Interrupt acceptance
First instruction in interrupt
exception service routine
exception service routine
Instruction (instruction replacing
interrupt exception handling)
interrupt exception handling)
Figure 7.7 Example of Pipeline Operation when Interrupt is Accepted during RESBANK
Instruction Execution (Register Banking without Register Bank Overflow)
F
2 Icyc + 3 Bcyc + 1 Pcyc
3 Icyc
m1
m2
m3
3 Icyc + m1 + m2
IRQ
D
E
E
M
M
M
M
F
D
[Legend]
m1:
m2:
m3:
m1:
m2:
m3:
Vector address read
Saving of SR (stack)
Saving of PC (stack)
Saving of SR (stack)
Saving of PC (stack)
Interrupt acceptance
First instruction in interrupt exception
service routine
service routine
Instruction (instruction replacing
interrupt exception handling)
interrupt exception handling)
...
...
...
Figure 7.8 Example of Pipeline Operation when IRQ Interrupt is Accepted
(Register Banking with Register Bank Overflow)