Renesas R5S72621 Manual Do Utilizador

Página de 2152
 
 
 
 
 
 
Section 12   Compare Match Timer 
 
R01UH0134EJ0400  Rev. 4.00  
 
Page 653 of 2108 
Sep 24, 2014 
 
 
 
SH7262 Group, SH7264 Group 
Bit Bit 
Name 
Initial 
Value R/W  Description 
1, 0 
CKS[1:0] 
00 
R/W 
Clock Select 
These bits select the clock to be input to CMCNT from 
four internal clocks obtained by dividing the peripheral 
clock (P
). When the STR bit in CMSTR is set to 1, 
CMCNT starts counting on the clock selected with bits 
CKS[1:0]. 
00: P
/8 
01: P
/32 
10: P
/128 
11: P
/512 
Note:  *  Only 0 can be written to clear the flag after 1 is read.