Renesas R5S72621 Manual Do Utilizador

 

 

Section 19   Serial I/O with FIFO 

 

 

Page 956 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

9 

RFFULE 

0 

R/W 

Receive FIFO Full Enable 

0: Disables interrupts due to receive FIFO full 

1: Enables interrupts due to receive FIFO full 

8 

RDREQE 

0 

R/W 

Receive FIFO Transfer Request Enable 

0: Disables interrupts/DMA transfer requests due to 

receive FIFO transfer requests 

1: Enables interrupts/DMA transfer requests due to 

receive FIFO transfer requests 

7 to 5 

 All 

0 

R 

Reserved 

These bits are always read as 0. The write value should 
always be 0. 

4 

FSERRE 

0 

R/W 

Frame Synchronization Error Enable 

0: Disables interrupts due to frame synchronization error  

1: Enables interrupts due to frame synchronization error  

3 

TFOVFE 

0 

R/W 

Transmit FIFO Overflow Enable 

0: Disables interrupts due to transmit FIFO overflow 

1: Enables interrupts due to transmit FIFO overflow 

2 

TFUDFE 

0 

R/W 

Transmit FIFO Underflow Enable 

0: Disables interrupts due to transmit FIFO underflow 

1: Enables interrupts due to transmit FIFO underflow 

1 

RFUDFE 

0 

R/W 

Receive FIFO Underflow Enable 

0: Disables interrupts due to receive FIFO underflow 

1: Enables interrupts due to receive FIFO underflow 

0 

RFOVFE 

0 

R/W 

Receive FIFO Overflow Enable 

0: Disables interrupts due to receive FIFO overflow 

1: Enables interrupts due to receive FIFO overflow