Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 Ficha De Dados

Datasheet

153

B/D/F/Type:

0/1/0/PCI

Address Offset: 8h

Default Value:

see table below

Access:

RO 

Size:

8 bits

This register contains the revision number of the MCH device 1. These bits are read 

only and writes to this register have no effect.

B/D/F/Type:

0/1/0/PCI

Address Offset: 9–Bh

Default Value:

060400h

Access:

RO 

Size:

24 bits

This register identifies the basic function of the device, a more specific sub-class, and a 

register-specific programming interface.

7:0

RO

see 

description

Revision Identification Number (RID1): This is an 8-bit value that 
indicates the revision identification number for the MCH Device 0. Refer to the 
Intel

 3200 and 3210 Chipset Specification Update for the value of this 

register. 

23:16

RO

06h

Base Class Code (BCC): Indicates the base class code for this device. This 
code has the value 06h, indicating a Bridge device. 

15:8

RO

04h

Sub-Class Code (SUBCC): Indicates the sub-class code for this device. The 
code is 04h indicating a PCI to PCI Bridge. 

7:0

RO

00h

Programming Interface (PI): Indicates the programming interface of this 
device. This value does not specify a particular register set layout and provides 
no practical use for this device.