Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 Ficha De Dados
Códigos do produto
P4X-UPE3210-316-6M1333
Datasheet
181
Host-Primary PCI Express* Bridge Registers (D1:F0)
9:8
RO
00b
Power Indicator Control (PIC): If a Power Indicator is implemented, writes to
this field set the Power Indicator to the written state. Reads of this field must
reflect the value from the latest write, unless software issues a write without
waiting for the previous command to complete in which case the read value is
undefined.
00 = Reserved
01 = On
10 = Blink
11 = Off
If the Power Indicator Present bit in the Slot Capabilities register is 0b, this field
is permitted to be read-only with a value of 00b.
this field set the Power Indicator to the written state. Reads of this field must
reflect the value from the latest write, unless software issues a write without
waiting for the previous command to complete in which case the read value is
undefined.
00 = Reserved
01 = On
10 = Blink
11 = Off
If the Power Indicator Present bit in the Slot Capabilities register is 0b, this field
is permitted to be read-only with a value of 00b.
7:6
RO
00b
Attention Indicator Control (AIC): If an Attention Indicator is implemented,
writes to this field set the Attention Indicator to the written state.
Reads of this field must reflect the value from the latest write, unless software
issues a write without waiting for the previous command to complete in which
case the read value is undefined. If the indicator is electrically controlled by
chassis, the indicator is controlled directly by the downstream port through
implementation specific mechanisms.
00 = Reserved
01 = On
10 = Blink
11 = Off
If the Attention Indicator Present bit in the Slot Capabilities register is 0b, this
field is permitted to be read only with a value of 00b.
writes to this field set the Attention Indicator to the written state.
Reads of this field must reflect the value from the latest write, unless software
issues a write without waiting for the previous command to complete in which
case the read value is undefined. If the indicator is electrically controlled by
chassis, the indicator is controlled directly by the downstream port through
implementation specific mechanisms.
00 = Reserved
01 = On
10 = Blink
11 = Off
If the Attention Indicator Present bit in the Slot Capabilities register is 0b, this
field is permitted to be read only with a value of 00b.
5:4
RO
00b
Reserved
3
RW
0b
Presence Detect Changed Enable (PDCE): When set to 1b, this bit enables
software notification on a presence detect changed event.
software notification on a presence detect changed event.
2
RO
0b
MRL Sensor Changed Enable (MSCE): When set to 1b, this bit enables
software notification on a MRL sensor changed event.
Default value of this field is 0b. If the MRL Sensor Present field in the Slot
Capabilities register is set to 0b, this bit is permitted to be read-only with a value
of 0b.
software notification on a MRL sensor changed event.
Default value of this field is 0b. If the MRL Sensor Present field in the Slot
Capabilities register is set to 0b, this bit is permitted to be read-only with a value
of 0b.
1
RO
0b
Power Fault Detected Enable (PFDE): When set to 1b, this bit enables
software notification on a power fault event.
Default value of this field is 0b. If Power Fault detection is not supported, this bit
is permitted to be read-only with a value of 0b
software notification on a power fault event.
Default value of this field is 0b. If Power Fault detection is not supported, this bit
is permitted to be read-only with a value of 0b
0
RO
0b
Button Pressed Enable (ABPE): When set to 1b, this bit enables software
notification on an attention button pressed event.
notification on an attention button pressed event.
Bit
Access
Default
Value
Description