Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 Ficha De Dados

Datasheet

257

B/D/F/Type:

0/6/0/MMR

Address Offset: 150–153h

Default Value:

00000000h

Access:

RO, RWO 

Size:

32 bits

This register provides the first part of a Link Entry that declares an internal link to 

another Root Complex Element.

B/D/F/Type:

0/6/0/MMR

Address Offset: 158–15Fh

Default Value:

0000000000000000h

Access:

RO, RWO 

Size:

64 bits

This register provides the second part of a Link Entry that declares an internal link to 

another Root Complex Element.

31:24

RO

00h

Target Port Number (TPN): This field specifies the port number associated 
with the element targeted by this link entry (Egress Port). The target port 
number is with respect to the component that contains this element as specified 
by the target component ID.

23:16

RWO

00h

Target Component ID (TCID): This field identifies the physical or logical 
component that is targeted by this link entry.

15:2

RO

0000h

Reserved 

1

RO

0b

Link Type (LTYP): This bit indicates that the link points to memory–mapped 
space (for RCRB). The link address specifies the 64-bit base address of the 
target RCRB.

0

RWO

0b

Link Valid (LV): 
0 = Link Entry is not valid and will be ignored.
1 = Link Entry specifies a valid link.

63:32

RO

0000000

0h

Reserved 

31:12

RWO

00000h

Link Address (LA): This field provides the memory mapped base address of 
the RCRB that is the target element (Egress Port) for this link entry.

11:0

RO

000h

Reserved