Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 Ficha De Dados
Códigos do produto
P4X-UPE3210-316-6M1333
Datasheet
71
DRAM Controller Registers (D0:F0)
5.1.8
HDR—Header Type
B/D/F/Type:
0/0/0/PCI
Address Offset: Eh
Default Value:
00h
Access:
RO
Size:
8 bits
This register identifies the header layout of the configuration space. No physical
register exists at this location.
5.1.9
SVID—Subsystem Vendor Identification
B/D/F/Type:
0/0/0/PCI
Address Offset: 2C–2Dh
Default Value:
0000h
Access:
RWO
Size:
16 bits
This value is used to identify the vendor of the subsystem.
5.1.10
SID—Subsystem Identification
B/D/F/Type:
0/0/0/PCI
Address Offset: 2E–2Fh
Default Value:
0000h
Access:
RWO
Size:
16 bits
This value is used to identify a particular subsystem.
Bit
Access
Default
Value
Description
7:0
RO
00h
PCI Header (HDR): This field always returns 0 to indicate that the MCH is a
single function device with standard header layout. Reads and writes to this
location have no effect.
single function device with standard header layout. Reads and writes to this
location have no effect.
Bit
Access
Default
Value
Description
15:0
RWO
0000h
Subsystem Vendor ID (SUBVID): This field should be programmed during
boot-up to indicate the vendor of the system board. After it has been written
once, it becomes read only.
boot-up to indicate the vendor of the system board. After it has been written
once, it becomes read only.
Bit
Access
Default
Value
Description
15:0
RWO
0000h
Subsystem ID (SUBID): This field should be programmed during BIOS
initialization. After it has been written once, it becomes read only.
initialization. After it has been written once, it becomes read only.