Integral INMPCIE64G50MXB Manual Do Utilizador
7
DSTROBE(UDMA data
strobe)
When UDMA mode DMA Read is active,
this signal is the data-in strobe generated
by the device.
26
CSEL(Cable select)
I
This pin is used to configure this device
as Device 0 or Device 1.
30
-DMACK(DMA
acknowledge)
I
This signal is used by the host in respond
to DMARQ to initiate DMA transfer.
44
INTRQ(Interrupt)
O
When this device is selected, this signal is
the active high Interrupt Request to the
host
43
IOIS16
O
During PIO transfer mode0,1or 2, this
pin indicates to the host the 16-bit data
port has been addressed and the device is
prepared to send or receive a 16-bit data
word.
When transferring in DMA mode, the
host must use a 16-bit DMA channel and
this signal will not be asserted.
37, 39, 41
HA0~HA2(Device Address)
I
This is 3-bit binary coded Address Bus.
45
-PDIAG(Passed diagnostics)
I/O
This signal will be asserted by Device 1 to
indicate to Device 0 that Device 1 has
completed diagnostics,
-CBLID(Cable assembly
type identify)
46,48
-CS0, -CS1(Chip select)
I
These signals are used to select the
Command Block and Control Block
registers. When –DMACK is asserted,
-Cs0 and –Cs1 shall be negated and
transfers shall be 16-bit wide.
52
-DASP(Device active, Device
1 present)
I/O
During the reset protocol, -DASP shall be
asserted by Device 1 to indicate that the
device is present.
47, 49, 51
VCC
P
Power supply
9, 15, 21, 27, 29, 35,
4, 18, 26, 34, 40, 50
GND
--
Ground.
*Note:
“I”
An input from the host system to the device.