Cisco Cisco UCS C3260 Rack Server Ficha De Dados

External Interfaces

PCI Express* Interface v 2.1 with 5.0 GT/s and 2.5 GT/s Support for x1, x2, x4, x8 links widths (Lanes)

Network Interfaces: Two independent Ethernet interfaces for 10GBASE-T, 1000BASE-T, and 100BASE-TX applications (IEEE 802.3an, 802.3, 802.3u, and 802.3ab)

Management Interfaces

• Pass-Through (PT) Functionality via a sideband interface
• DMTF Network Controller Sideband Interface (NC-SI)
• Intel® System Management Bus (SMBus)

BOM Cost Reduction

Features

Benefits

Single chip design

• Designed for passive heatsink thermal solutions

25 mm x 25 mm package size

• Small packaging for easier board layout and design

Integrated copper 10GBASE-T PHYs

• Single chip with integrated PHYs for lower power and simplified component placement

5th Channel Filtering and cable diagnostics

• Senses and cancels common-mode and board noise and provides advanced troubleshooting data

Intel® Lead-free technology and RoHS-compliant

• Compliant with the European Union directive (July 2006) to reduce hazardous materials

Autonomous on-die thermal management

• Monitor on-die temperature and react when the temperature exceeds a pre-defined threshold

Ethernet Features

Features

Benefits

IEEE 802.3* auto-negotiation

• Automatic link configuration for speed, duplex, flow control

Automatic Cable Diagnostics

• Powerful cable diagnostic algorithm to accurately measure all of the TDR and TDT sequences within the group of four channels

Independent port enabling and link speeds

• Each port can be configured and operated at different speeds and in different modes

IEEE 802.3x and 802.3z compliant flow control support with

software-controllable Rx thresholds and Tx pause frames

• Local control of network congestion levels

• Frame loss reduced from receive overruns

Data Center Bridging (DCB) support

• IEEE Compliance to Enhanced Transmission Selection (ETS), 802.1Qaz Priority-based Flow Control (PFC), 802.1Qbb Quantized

Congestion Notification

Automatic cross-over detection function (MDI/MDI-X)

• The PHY automatically detects which application is being used and configures itself accordingly

IEEE 1588 protocol and IEEE 802.1AS implementation

• Time-stamping and synchronization of time sensitive applications

• Distribute common time to media devices

IEEE 802.1ad (Double VLAN)

• Double-tagging can be useful for Internet service providers, allowing the use of VLANs internally while mixing traffic from

clients that are already VLAN-tagged

IEEE 802.1Q (VLAN)

• Provide data separation and security between network traffic

Security and Power Management

Features

Benefits

Receive Packet Filtering

• Determine which of the incoming packets are allowed to pass to the local machine based on L2, VLAN, or management policies

Integrated MACsec, 802.1AE Security Offload Engines

• Offloads for MAC-level encryption/authentication scheme defined in IEEE 802.1AE that uses symmetric cryptography

Integrated IPsec Security Engines for offloads of up to 1024

Security Associations (SA) for each Tx and Rx

• Offloads handle a certain amount of the total number of IPsec flows on the controller in hardware

Anti-spoofing for MAC and VLANs

• Capability insures that a VM always uses a source Ethernet VLAN or MAC address on the transmit path that is part of the set of

VLAN tags and Ethernet MAC addresses defined on the Rx path

Four Software-Definable Pins (SDP) per port

• Software-defined pins (SDP pins) per port that can be used for miscellaneous hardware or software-controllable purposes

Access Control Services (ACS)

• ACS Extended Capability structures on all functions

Active State Power Management (ASPM) Support

• Optionality Compliance bit to help determine whether to enable ASPM or whether to run ASPM compliance tests to support

entry to L0

LAN disable function

• Option to disable the LAN Port and/or PCIe Function. Disabling just the PCIe function but keeping the LAN port that resides on

it fully active (for manageability purposes and BMC pass-through traffic)

Full wake up support:

• Advanced Power Management (APM) Support (formerly Wake

on LAN)

• Advanced Configuration and Power Interface (ACPI)

specification v2.0c

• Magic Packet* wake-up enable with unique MAC address

• APM - Designed to receive a broadcast or unicast packet with an explicit data pattern (Magic Packet) and assert a signal to

wake up the system

• ACPI - PCIe power management based wake-up that can generate system wake-up events from a number of sources

Low Power Operation and Power Management

• Incorporates numerous features to maintain the lowest power possible including PCI Express Link and Network Interface

power management

ACPI register set and power down functionality supporting D0

and D3 states

• A power-managed link speed control lowers link speed (and power) when highest link performance is not required

Low Power Link Up - Link Speed Control

• Enables a link to come up at the lowest possible speed in cases where power is more important than performance