Intel AT80604004872AA Manual Do Utilizador
Intel® Xeon® Processor 7500 Datasheet, Volume 1
163
Features
Example: The Intel® Xeon® processor 7500 series supports a minimum operating
Intel® SMI transfer rate of 4.8 GT/s. Therefore, offset 35h-36h has a hex value of
4800h.
Intel® SMI transfer rate of 4.8 GT/s. Therefore, offset 35h-36h has a hex value of
4800h.
7.5.4.7
VIOVID: VIO VID
Offset 37h-38h is the Processor VIO VID (Voltage Identification) field and contains the
voltage requested via the VID pins. This field, rounded to the next thousandth, is in mV
and is reflected in binary coded decimal. Some systems read this offset to determine if
all processors support the same default VID setting. Writes to this register have no
effect.
voltage requested via the VID pins. This field, rounded to the next thousandth, is in mV
and is reflected in binary coded decimal. Some systems read this offset to determine if
all processors support the same default VID setting. Writes to this register have no
effect.
Example: A voltage of 1.350 V maximum core VID would contain 1350h in Offset 36-
37h.
37h.
7.5.4.8
VIOVTH: VIO Voltage Tolerance, High
Offset 39h contains the VIO voltage tolerance, high. This is the maximum voltage
swing above the required voltage allowed. This field, rounded to the next thousandth,
is in mV and is reflected in binary coded decimal. A value of FF indicates that this value
is undetermined. Writes to this register have no effect.
swing above the required voltage allowed. This field, rounded to the next thousandth,
is in mV and is reflected in binary coded decimal. A value of FF indicates that this value
is undetermined. Writes to this register have no effect.
Example: A 50 mV tolerance would be saved as 50h.
7.5.4.9
VIOVTL: Voltage Tolerance, Low
Offset 3Ah contains the VIO voltage tolerance, low. This is the minimum voltage swing
under the required voltage allowed. This field, rounded to the next thousandth, is in mV
and is reflected in binary coded decimal. A value of FF indicates that this value is
undetermined. Writes to this register have no effect.
under the required voltage allowed. This field, rounded to the next thousandth, is in mV
and is reflected in binary coded decimal. A value of FF indicates that this value is
undetermined. Writes to this register have no effect.
Example: A 50 mV tolerance would be saved as 50h.
Offset:
35h-36h
Bit
Description
15:0
Minimum Intel® SMI Transfer Rate
0000h-FFFFh: MHz
Offset:
37h-38h
Bit
Description
15:0
VIO VID
0000h-FFFFh: mV
Offset:
39h
Bit
Description
7:0
VIO Voltage Tolerance, High
00h-FFh: mV