Cisco Cisco Packet Data Gateway (PDG) Documentation Roadmaps
New In This Release
Common Features ▀
Cisco ASR 5000 Series Product Overview ▄
OL-22937-01
A second-generation data transport fixed programmable gate array (DT2 FPGA, abbreviated as DT2) connects the
PPC‘s NPU bus to the switch fabric interface. The FPGA also provides a bypass path between the line card or
Redundancy Crossbar Card (RCC) and the switch fabric for ATM traffic. Traffic from the line cards or the RCC is
received over the FPGA‘s serial links and is sent to the NPU on its switch fabric interface. The traffic destined for the
line cards or RCC is diverted from the NPU interface and sent over the serial links. DT2 FPGA also connects to the
control processors subsystem via a PCI-E bus. The PCI-E interface allows the control processors to perform register
accesses to the FPGA and some components attached to it, and also allows DMA operations between the NPU and the
control processors‘ memory. A statistics engine is provided in the FPGA. Two reduced latency DRAM (RLDRAM)
chips attached to the FPGA provide 64MB of storage for counters.
PPC‘s NPU bus to the switch fabric interface. The FPGA also provides a bypass path between the line card or
Redundancy Crossbar Card (RCC) and the switch fabric for ATM traffic. Traffic from the line cards or the RCC is
received over the FPGA‘s serial links and is sent to the NPU on its switch fabric interface. The traffic destined for the
line cards or RCC is diverted from the NPU interface and sent over the serial links. DT2 FPGA also connects to the
control processors subsystem via a PCI-E bus. The PCI-E interface allows the control processors to perform register
accesses to the FPGA and some components attached to it, and also allows DMA operations between the NPU and the
control processors‘ memory. A statistics engine is provided in the FPGA. Two reduced latency DRAM (RLDRAM)
chips attached to the FPGA provide 64MB of storage for counters.
For detailed information about the PPC, refer to the ASR 5000 Hardware Administration and Installation Guide.
Side-by-side Redundancy for the 10 Gig Line Card (XGLC)
The ASR 5000 chassis provides the redundancy scheme for using top and bottom line card slots for one-to-one
redundancy for line cards with top and bottom line card slot for one-to-one redundancy. The 10 Gig Line Card (XGLC)
is a full-height card that requires both top and bottom line card slots for a single 10-gigabit port. This means that the
scheme for using top and bottom line card slots for one-to-one redundancy is not workable for XGLCs. This feature
provides side-by-side 1:1 XGLC redundant arrangement from functioning with other Ethernet line card types
redundancy for line cards with top and bottom line card slot for one-to-one redundancy. The 10 Gig Line Card (XGLC)
is a full-height card that requires both top and bottom line card slots for a single 10-gigabit port. This means that the
scheme for using top and bottom line card slots for one-to-one redundancy is not workable for XGLCs. This feature
provides side-by-side 1:1 XGLC redundant arrangement from functioning with other Ethernet line card types
Description
The XGLC is a full-height card that requires both top and bottom line card slots for a single 10-gigabit port. This means
that the scheme for using top and bottom line card slots for one-to-one redundancy is not workable for XGLCs. To
achieve one-to-one line card redundancy, user must install two XGLCs in adjacent slots. Otherwise, user can configure
port and card redundancy for the XGLCs in the same way as other line cards. There are no restrictions that prevent the
side-to-side 1:1 XGLC redundant arrangement from functioning with other Ethernet line card types.
that the scheme for using top and bottom line card slots for one-to-one redundancy is not workable for XGLCs. To
achieve one-to-one line card redundancy, user must install two XGLCs in adjacent slots. Otherwise, user can configure
port and card redundancy for the XGLCs in the same way as other line cards. There are no restrictions that prevent the
side-to-side 1:1 XGLC redundant arrangement from functioning with other Ethernet line card types.
Each PSC or PSC2 is mated to a single XGLC. Monitoring functions occur in a distributed fashion. Select the line cards
that act as a redundant pair via the CLI. Configure the redundant pairs prior to configuring the interface bindings so that
proper parallel physical and logical port configurations are established. The card redundancy and monitoring begins as
soon as the PSC or PSC2 in front is active.
that act as a redundant pair via the CLI. Configure the redundant pairs prior to configuring the interface bindings so that
proper parallel physical and logical port configurations are established. The card redundancy and monitoring begins as
soon as the PSC or PSC2 in front is active.
Note: Side-by-side 1:1 redundancy only operates on top line card slot numbers: cards 17 through 23 and 26 through 32.
Make sure that both PSCs or PSC2s in front of the line cards are of the same type, configured as a redundant pair, and
active.
Make sure that both PSCs or PSC2s in front of the line cards are of the same type, configured as a redundant pair, and
active.
For more information on side by side 1:1 redundancy for 10 Gig line card (XGLC), refer to the ASR 5000 Hardware
Installation Guide.
Installation Guide.
License Keys
No separate license key required.