Intel D915GAVL Manual Do Utilizador
55
2
Technical Reference
What This Chapter Contains
2.1
Introduction .................................................................................................................. 55
2.2
Memory Resources ...................................................................................................... 55
2.3
DMA Channels ............................................................................................................. 57
2.4
Fixed I/O Map............................................................................................................... 58
2.5
PCI Configuration Space Map...................................................................................... 59
2.6
Interrupts ...................................................................................................................... 60
2.7
PCI Conventional Interrupt Routing Map ..................................................................... 61
2.8
Connectors................................................................................................................... 63
2.9
Jumper Block ............................................................................................................... 77
2.10
Mechanical Considerations .......................................................................................... 78
2.11
Electrical Considerations.............................................................................................. 81
2.12
Thermal Considerations ............................................................................................... 83
2.13
Reliability...................................................................................................................... 85
2.14
Environmental .............................................................................................................. 86
2.15
Regulatory Compliance................................................................................................ 87
2.1
Introduction
Sections 2.2 - 2.6 contain several standalone tables. Table 13 describes the system memory map,
Table 14 lists the DMA channels, Table 15 shows the I/O map, Table 16 defines the PCI
Conventional bus configuration space map, and Table 17 describes the interrupts. The remaining
sections in this chapter are introduced by text found with their respective section headings.
Table 14 lists the DMA channels, Table 15 shows the I/O map, Table 16 defines the PCI
Conventional bus configuration space map, and Table 17 describes the interrupts. The remaining
sections in this chapter are introduced by text found with their respective section headings.
2.2
Memory Resources
2.2.1
Addressable Memory
The board utilizes 4 GB of addressable system memory. Typically the address space that is
allocated for PCI Conventional bus add-in cards, PCI Express configuration space, BIOS (firmware
hub), and chipset overhead resides above the top of DRAM (total system memory). On a system
that has 4 GB of system memory installed, it is not possible to use all of the installed memory due
to system address space being allocated for other system critical functions. These functions include
the following:
• BIOS/firmware hub (2 MB)
allocated for PCI Conventional bus add-in cards, PCI Express configuration space, BIOS (firmware
hub), and chipset overhead resides above the top of DRAM (total system memory). On a system
that has 4 GB of system memory installed, it is not possible to use all of the installed memory due
to system address space being allocated for other system critical functions. These functions include
the following:
• BIOS/firmware hub (2 MB)
• Local APIC (19 MB)
• Digital Media Interface (40 MB)
• Digital Media Interface (40 MB)
• Front side bus interrupts (17 MB)
• PCI Express configuration space (256 MB)
• PCI Express configuration space (256 MB)