FIC mb02 Manual Do Serviço
FIC CONFIDENTIAL AND PROPRIETARY
MB02 Functional Specifications Rev. 0.3 Page 39
MB02 Functional Specifications Rev. 0.3 Page 39
FIC H/W
FIC CONFIDENTIAL AND PROPRIETARY 11-November-2002_
00-01h
RO
Vendor ID
8086h
02-03h
RO
Device ID
103Ah
04-05h
RO, r/w
PCI Command
0000h
06-07h
RO, r/wc
PCI Status
0290h
08h
RO
Revision ID
00h
0Ah
RO
Sub-Class Code
00h
0Bh
RO
Base Class Code
02h
0Ch
RO
Cache Line Size
00h
0Dh
RO
Master Latency Timer
00h
0Eh
RO
Header Type
00h
10-13h
RO, r/w CSR_MEM_BASE CSR Memory-
Mapped Base Address
0008
14-17h
RO, r/w
CSR_IO_BASE CSR IO-Mapped
Base Address
Base Address
0001h
2C-2Dh
RO
SVID
0000h
2E-2Fh
RO
SID
0000h
34h
RO
CAP_PTR
DCh
3Ch
r/w
INT_LN
00h
3Dh
RO
INT_PN
01h
3Eh
RO
MIN_GNT
08h
3Fh
RO
MAX_LT
38h
DCh
RO
CAP_ID
01h
DDh
RO
NXT_PTR
00h
DE-DFh
RO
PM_CAP
FE21h
E0-E1h
RO, r/w, r/wc PMCSR
0000h
E3h
RO
PCIDATA
00
6.10 Intel ICH4-M Hub Interface to PCI Bridge Registers Summary(Device 30, Function 0)
Register Address
Access Type
Register Name
Default Value
00-01h
RO
Vendor ID
8086h
02-03h
RO
Device ID
2448h
04-05h
RO, r/w
PCI Command
0001h
06-07h
RO, r/wc
PCI Status
0080h
08h
RO
Revision ID
--
0Ah
RO
Sub-Class Code
04h
0Bh
RO
Base Class Code
06h
0Dh
RO
Primary Master Latency Timer
00h
0Eh
RO
Header Type
01h
18h
RO
Primary Bus Number
00h
19h
r/w
Secondary Bus Number
00h
1Ah
r/w
Subordinate Bus Number
00h
1Bh
r/w
Secondary Master Latency Timer
00h
1Ch
RO, r/w
IO Base Register
F0h
1Dh
RO, r/w
IO Limit Register
00h
1E-1Fh
RO, r/wc
Secondary Status Register
0280h
20-21h
r/w
Memory Base
FFF0h
22-23h
r/w
Memory Limit
0000h
PDF created with FinePrint pdfFactory trial version